Taeryeong Kim

According to our database, Taeryeong Kim authored at least 5 papers between 2022 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface.

Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

IEEE J. Solid State Circuits, June, 2025

Design and Analysis of Static-Free PAM-4 Transmitter for HBM TSV Interface.

Jeonghyeok You, Hohyun Chae, Taeryeong Kim, Ji Hoon Lee, Seong-Ook Jung

Proceedings of the International Conference on Electronics, Information, and Communication, 2025

2023

An Energy-Efficient Design of TSV I/O for HBM With a Data Rate up to 10 Gb/s.

Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

IEEE J. Solid State Circuits, November, 2023

A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QEC.

Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

A Low Power TSV I/O with Data Rate up to 10 Gb/s for Next Generation HBM.

Ji-Young Kim, Taeryeong Kim, Jeonghyeok You, Ki-Ryong Kim, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022