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Taeyang Sim

Orcid: 0009-0005-2176-4952

According to our database1, Taeyang Sim authored at least 4 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 36-Gb/s Single-Ended PAM-4 Receiver With Voltage-Feedback DFE in 40-nm CMOS Technology.
[BibTeX]
[DOI]
Taeyang Sim
,
Geunyoung You
,
Hwanseok Jung
,
Donghun Lee
,
Taeho Shin
,
Jaeduk Han
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2026

2024
A 28-Gb/s Single-Ended PAM-4 Receiver With T-Coil-Integrated Continuous-Time Linear Equalizer in 40-nm CMOS Technology.
[BibTeX]
[DOI]
Taeyang Sim
,
Sun-Ho Yeom
,
Hyunwoo Im
,
Youngmin Oh
,
Hyeongmin Seo
,
Hyeongjun Ko
,
Hankyu Chi
,
Hae-Kang Jung
,
Jaeduk Han
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

2023
Analysis of Grounded Coplanar Waveguide (GCPW) for High-Speed Links Channel.
[BibTeX]
[DOI]
Youngmin Oh
,
Taeyang Sim
,
Jaeduk Han
Proceedings of the 20th International SoC Design Conference, 2023

An Analysis of CMOS Latched Comparators.
[BibTeX]
[DOI]
Sun-Ho Yeom
,
Taeyang Sim
,
Jaeduk Han
Proceedings of the International Conference on Electronics, Information, and Communication, 2023


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