Takahiro Iinuma

According to our database, Takahiro Iinuma authored at least 9 papers between 2006 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Extremely Weak Feedback Method for Controlling Chaotic Resonance.

Takahiro Iinuma, Yudai Ebato, Sou Nobukawa, Anh Tu Tran, Nobuhiko Wagatsuma, Keiichiro Inagaki, Hirotaka Doho, Teruya Yamanishi, Haruhiko Nishimura

Proceedings of the IEEE International Conference on Systems, Man, and Cybernetics, 2023

2022

Assembly of Echo State Networks Driven by Segregated Low Dimensional Signals.

Takahiro Iinuma, Sou Nobukawa, Satoshi Yamaguchi

Proceedings of the International Joint Conference on Neural Networks, 2022

2020

5.7 A 132dB Single-Exposure-Dynamic-Range CMOS Image Sensor with High Temperature Tolerance.

Yorito Sakano, Takahiro Toyoshima, Ryosuke Nakamura, Tomohiko Asatsuma, Yuki Hattori, Takayuki Yamanaka, Ryoichi Yoshikawa, Naoki Kawazu, Tomohiro Matsuura, Takahiro Iinuma, Takahiro Toya, Tomohiko Watanabe, Atsushi Suzuki, Yuichi Motohashi, Junichiro Azami, Yasushi Tateshita, Tsutomu Haruta

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

A 1/4-inch 3.9Mpixel low-power event-driven back-illuminated stacked CMOS image sensor.

Oichi Kumagai, Atsumi Niwa, Katsuhiko Hanzawa, Hidetaka Kato, Shinichiro Futami, Toshio Ohyama, Tsutomu Imoto, Masahiko Nakamizo, Hirotaka Murakami, Tatsuki Nishino, Anas Bostamam, Takahiro Iinuma, Naoki Kuzuya, Kensuke Hatsukawa, Frederick T. Brady, William Bidermann, Toshifumi Wakano, Takashi Nagano, Hayato Wakabayashi, Yoshikazu Nitta

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2008

A Sub 100 mW H.264 MP@L4.1 Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer.

Yuichiro Murachi, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto

IEICE Trans. Electron., 2008

A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding.

Yuichiro Murachi, Kosuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

An H.264/AVC MP@L4.1 quarter-pel motion estimation processor VLSI for real-time MBAFF encoding.

Kosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2006

A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture.

Junichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

A Power- and Area-Efficient SRAM Core Architecture for Super-Parallel Video Processing.

Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto, Tetsuro Matsuno

Proceedings of the IFIP VLSI-SoC 2006, 2006