Takanobu Baba

According to our database1, Takanobu Baba authored at least 63 papers between 1977 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster.
IEICE Transactions, 2019

2018
Overcoming the difficulty of large-scale CGH generation on multi-GPU cluster.
Proceedings of the 11th Workshop on General Purpose Processing using GPUs, 2018

Data Distribution Method for Fast Giga-scale Hologram Generation on a Multi-GPU Cluster.
Proceedings of the 2018 Workshop on Advanced Tools, 2018

2017
Acceleration of Large-Scale CGH Generation Using Multi-GPU Cluster.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017

2015
Empirical performance study of speculative parallel processing on commercial multi-core CPU with hardware transactional memory.
Proceedings of the 2nd International Workshop on Software Engineering for Parallel Systems, 2015

2014
Accelerating sequential programs on commodity multi-core processors.
J. Parallel Distrib. Comput., 2014

2013
Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application.
SIGARCH Computer Architecture News, 2013

An automatic thread decomposition approach for pipelined multithreading.
IJHPCN, 2013

Exploration of Highly Accurate Path Prediction Mechanism Using Detailed Path History.
Proceedings of the First International Symposium on Computing and Networking, 2013

2012
Proposal of Incremental Software Simulation for Reduction of Evaluation Time.
Proceedings of the Third International Conference on Networking and Computing, 2012

Comparative Study of Path Prediction Method for Speculative Loop Execution.
Proceedings of the Third International Conference on Networking and Computing, 2012

2011
Steady/Unsteady Communication Performance in Large-Scale Regular Networks.
Proceedings of the 25th IEEE International Conference on Advanced Information Networking and Applications Workshops, 2011

2010
Automatic Thread Decomposition for Pipelined Multithreading.
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010

Loop Performance Improvement for Min-cut Program Decomposition Method.
Proceedings of the First International Conference on Networking and Computing, 2010

2009
Clustered Software Queue for Efficient Pipelined Multithreading.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

An Effective Throttling Method Based on Quasi-global Congestion Information.
Proceedings of the 10th International Symposium on Pervasive Systems, 2009

2008
Are Uniform Nerworks Scalable?
Proceedings of the Ninth International Conference on Parallel and Distributed Computing, 2008

Clustered Decoupled Software Pipelining on Commodity CMP.
Proceedings of the 14th International Conference on Parallel and Distributed Systems, 2008

Potentials of Branch Predictors: From Entropy Viewpoints.
Proceedings of the Architecture of Computing Systems, 2008

2007
A thread partitioning technique for multithreaded execution along hot paths.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2007

Introducing entropies for representing program behavior and branch predictor performance.
Proceedings of the Workshop on Experimental Computer Science, 2007

2006
Entropy Throttling: A Physical Approach for Maximizing Packet Mobility in Interconnection Networks.
Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005
Design and Implementation of a VLIW Processor Simulation Environment with Instruction Scheduling Framework.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005

Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems.
Proceedings of the Sixth International Conference on Parallel and Distributed Computing, 2005

Cross-Line - A Globally Adaptive Control Method of Interconnection Network.
Proceedings of the High-Performance Computing - 6th International Symposium, 2005

2003
Receiving message prediction method.
Parallel Computing, 2003

2002
A Methodology of Binary-level Multithreading and Its Preliminary Evaluation.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

Real-Time Medical Diagnosis on a Multiple FPGA-based System.
Proceedings of the Field-Programmable Logic and Applications, 2002

A Scalable FPGA-Based Custom Computing Machine for a Medical Image Processing.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001
Design and Evaluation of Speculative Multi-threading with Selective Multi-Path Execution.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

2000
Design, Implementation and Evaluation of a Parallel Object-Oriented Language A-NETL.
Scalable Computing: Practice and Experience, 2000

Recover-X: An Adaptive Router with Limited Escape Channels.
Proceedings of the Seventh International Conference on Parallel and Distributed Systems, 2000

1998
Chaotic Evolutionary Parallel Computation on Intelligent Agents.
JRM, 1998

Evolutionary Computation for Intelligent Agents Based on Chaotic Retrieval and Soft DNA.
Proceedings of the Simulated Evolution and Learning, 1998

A Cost and Performance Comparison for Wormhole Routers based on HDL Designs.
Proceedings of the International Conference on Parallel and Distributed Systems, 1998

1997
Event-based debugging system for a parallel object-oriented language A-NETL.
Systems and Computers in Japan, 1997

Evolutionary parallel computation on welfare intelligent agent.
Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1997

Parallel Navigation in an A-NETL Based Parallel OODBMS.
Proceedings of the High Performance Computing, International Symposium, 1997

Chaotic Evolutionary Processing for Intelligent Agents.
Proceedings of the Progress in Connectionist-Based Information Systems: Proceedings of the 1997 International Conference on Neural Information Processing and Intelligent Information Systems, 1997

1996
Node processor for a parallel object-oriented total architecture A-NET.
Systems and Computers in Japan, 1996

1995
A Declarative Synchronization Mechanism for Parallel Object-Oriented Computation.
IEICE Transactions, 1995

Programming and Debugging for Massively Parallelism: The Case for a Parallel Object-Oriented Language A-NETL.
Proceedings of the Object-Based Parallel and Distributed Computation, 1995

1994
Transactions of the Japan Computer Chess Association (in Japanese).
ICGA Journal, 1994

Research on programming languages for massively parallel processing.
Proceedings of the International Symposium on Parallel Architectures, 1994

1991
A parallel object-oriented language A-NETL and its programming environment.
Proceedings of the Fifteenth Annual International Computer Software and Applications Conference, 1991

1990
A parallel object-oriented total architecture: A-NET.
Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990

A network-topology independent task allocation strategy for parallel computers.
Proceedings of the Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 1990, 1990

1989
Generating cartesian products of two sets on a shuffle-exchange network.
Systems and Computers in Japan, 1989

1988
Unification parallelism for prolog processing.
Systems and Computers in Japan, 1988

Fast processing of an object-oriented language by a low-level parallel computer munap.
Systems and Computers in Japan, 1988

1987
Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis.
IEEE Trans. Computers, 1987

A visual microprogramming system.
Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987

A Network Algorithm for Relational Database Operations.
Proceedings of the Database Machines and Knowledge Base Machines, 1987

1986
Architectural evaluation of a universal host computer munap.
Systems and Computers in Japan, 1986

Data Abstraction Technique for Relational Database Query Processing.
Systems and Computers in Japan, 1986

Software testing system supported by a computer architecture.
Systems and Computers in Japan, 1986

Architectural Evaluation and Improvement of a Universal Host Computer MUNAP.
Proceedings of the Information Processing 86, 1986

1984
Compaction of two-level microprograms for a multiprocessor computer.
Proceedings of the 17th annual workshop on Microprogramming, 1984

1983
Hierarchical Micro-Architectures of a Two-Level Microprogrammed Multiprocessor Computer.
Proceedings of the International Conference on Parallel Processing, 1983

1982
A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions.
IEEE Trans. Computers, 1982

1981
The MPG System: A Machine-Independent Efficient Microprogram Generator.
IEEE Trans. Computers, 1981

1980
MUNAP - A Two-Level Microprogrammed Multiprocessor Architecture for Nonnumeric Processing.
Proceedings of the Information Processing, Proceedings of the 8th IFIP Congress 1980, Tokyo, Japan - October 6-9, 1980 and Melbourne, Australia, 1980

1977
A Microprogram Generating System-MPG.
Proceedings of the Information Processing, 1977


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