Takashi Enami

According to our database, Takashi Enami authored at least 7 papers between 2006 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

DMA-driven control method for low power sensor node.

Takashi Enami, Kentaro Kawakami, Hiroshi Yamazaki

Proceedings of the IEEE Topical Conference on Wireless Sensors and Sensor Networks, 2015

2012

Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis.

Takashi Enami, Takashi Sato, Masanori Hashimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

2010

Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation.

Takashi Enami, Shinyu Ninomiya, Kenichi Shinkai, Shinya Abe, Masanori Hashimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2009

Statistical Timing Analysis Considering Spatially and Temporally Correlated Dynamic Power Supply Noise.

Takashi Enami, Shinyu Ninomiya, Masanori Hashimoto

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008

Decoupling capacitance allocation for timing with statistical noise model and timing analysis.

Takashi Enami, Masanori Hashimoto, Takashi Sato

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

Validation of a Full-Chip Simulation Model for Supply Noise and Delay Dependence on Average Voltage Drop With On-Chip Delay Measurement.

Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto, Takashi Sato, Takao Onoye

IEEE Trans. Circuits Syst. II Express Briefs, 2007

2006

Measurement results of delay degradation due to power supply noise well correlated with full-chip simulation.

Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto, Takashi Sato, Takao Onoye

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006