Takeshi Ueno

According to our database, Takeshi Ueno authored at least 16 papers between 2002 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

An Active Slew Rate Control Gate Driver IC With Robust Discrete-Time Feedback Technique for 600-V Superjunction MOSFETs.

Shusuke Kawai, Takeshi Ueno, Hiroki Ishikuro, Kohei Onizuka

IEEE J. Solid State Circuits, February, 2023

2019

A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETs.

Shusuke Kawai, Takeshi Ueno, Kohei Onizuka

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2016

20 mV input, 4.2 V output SIDO boost converter with low-power controller and adaptive switch size selector for thermoelectric energy harvesting.

Yosuke Toyama, Taichi Ogawa, Takeshi Ueno, Tetsuro Itakura

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2012

Modeling Patent Quality: A System for Large-scale Patentability Analysis using Text Mining.

Shohei Hido, Shoko Suzuki, Risa Nishiyama, Takashi Imamichi, Rikiya Takahashi, Tetsuya Nasukawa, Tsuyoshi Idé, Yusuke Kanehira, Rinju Yohda, Takeshi Ueno, Akira Tajima, Toshiya Watanabe

J. Inf. Process., 2012

2010

A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System.

Takafumi Yamaji, Takeshi Ueno, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2008

1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters.

Takeshi Ueno, Tomohiko Ito, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Electron., 2008

An area-efficient sampling rate converter using negative feedback technique.

Masanori Furuta, Takafumi Yamaji, Takeshi Ueno, Tetsuro Itakura

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS.

Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006

55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers.

Daisuke Kurose, Tomohiko Ito, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEEE J. Solid State Circuits, 2006

Low-Power Design of 10-bit 80-MSPS Pipeline ADCs.

Tomohiko Ito, Daisuke Kurose, Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Balanced 3-phase analog signal processing for radio communications.

Takafumi Yamaji, Tetsuro Itakura, Rui Ito, Takeshi Ueno, Hidenori Okuni

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

A 0.9 V 1.5 mW Continuous-Time Modulator for W-CDMA.

Takeshi Ueno, Tetsuro Itakura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

A 10-bit, 200-MSPS, 105-mW pipeline A-to-D converter.

Tomohiko Ito, Takeshi Ueno, Daisuke Kurose, Takafumi Yamaji, Tetsuro Itakura

IEICE Electron. Express, 2005

A 1.2-V, 12-bit, 200M sample/s current-steering D/A converter in 90-nm CMOS.

Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2002

A fourth-order bandpass Δ-Σ modulator using second-order bandpass noise-shaping dynamic element matching.

Takeshi Ueno, Akira Yasuda, Takafumi Yamaji, Tetsuro Itakura

IEEE J. Solid State Circuits, 2002