Theerayod Wiangtong

Orcid: 0000-0002-9836-785X

According to our database1, Theerayod Wiangtong authored at least 18 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Analysis of Normalized Orthogonal Gradient Adaptive Algorithm Based on Spline Adaptive Filtering for Smart Communication Technology.
J. Mobile Multimedia, 2021

2019
Hammerstein Spline Adaptive Filtering based on Normalised Least Mean Square Algorithm.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

Performance Evaluation of Heterogeneous Cluster for Satellite Data Processing.
Proceedings of the 2019 International Symposium on Intelligent Signal Processing and Communication Systems, 2019

2017
PID design optimization using flower pollination algorithm for a buck converter.
Proceedings of the 17th International Symposium on Communications and Information Technologies, 2017

2016
Heterogeneous Computing Platform for data processing.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2016

2009
Object Tracking and Motion Capturing in Hardware-Accelerated Multi-camera System.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
Guest Editorial: Field Programmable Technology.
J. Signal Process. Syst., 2008

2006
Unified motor controller based on space vector modulation technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Hardware/software codesign: a systematic approach targeting data-intensive applications.
IEEE Signal Process. Mag., 2005

A Scaleable FFT/IFFT Kernel for Communication Systems Using Codesign Approach.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

2004
Hardware/software partitioning and scheduling for reconfigurable systems.
PhD thesis, 2004

2003
SONICmole: a debugging environment for the UltraSONIC reconfigurable computer.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Multitasking in hardware-software codesign for reconfigurable computer.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Cluster-Driven Hardware/Software Partitioning and Scheduling Approach for a Reconfigurable Computer System.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

A Unified Codesign Run-Time Environment for the UltraSONIC Reconfigurable Computer.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware-Software Codesign.
Des. Autom. Embed. Syst., 2002

Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software Codesign.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2000
FPGA based-IC design for inverter with vector modulation technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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