Theo J. Powell

According to our database, Theo J. Powell authored at least 14 papers between 1969 and 2006.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2006

Reducing Design Verification Cycle Time through Testbench Redundancy.

Aman Kokrady, Theo J. Powell, S. Ramakrishnan

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

Chasing subtle embedded RAM defects for nanometer technologies.

Theo J. Powell, Amrendra Kumar, Joseph Rayhawk, Nilanjan Mukherjee

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2003

BIST for Deep Submicron ASIC Memories with High Performance Application.

Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2000

Delta Iddq for Testing Reliability.

Theo J. Powell, James R. Pair, Melissa St. John, Doug Counce

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

1997

A 256Meg SDRAM BIST for Disturb Test Application.

Theo J. Powell, Dan Cline, Francis Hii

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996

Consistently dominant fault model for tristate buffer nets.

Theo J. Powell

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Correlating Defects to Functional and I_DDQ Tests.

Theo J. Powell, James R. Pair, Bernard G. Carbajal III

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1995

Test Generation and Design for Test for a Large Multiprocessing DSP.

Graham Hetherington, Greg Sutton, Kenneth M. Butler, Theo J. Powell

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1994

Correlating defect level to final test fault coverage for modular structured designs [microcontroller family].

Theo J. Powell, Kenneth M. Butler, Mike Ales, Roy Haley, Mark Perry

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

1988

Testability Features in the TMS370 Family of Microcomputers.

Theo J. Powell, Fred Hwang, Bill Johnson

Proceedings of the Proceedings International Test Conference 1988, 1988

1982

An Architecture for Testable VLSI Processors.

Satish M. Thatte, D. S. Ho, H.-T. Yuan, Thirumalai Sridhar, Theo J. Powell

Proceedings of the Proceedings International Test Conference 1982, 1982

Analysis and Simulation of Parallel Signature Analyzers.

Thirumalai Sridhar, D. S. Ho, Theo J. Powell, Satish M. Thatte

Proceedings of the Proceedings International Test Conference 1982, 1982

1969

A Module Diagnostic Procedure for Combinational Logic

Theo Jay Powell

PhD thesis, 1969

A Procedure for Selecting Diagnostic Tests.

Theo Jay Powell

IEEE Trans. Computers, 1969