Thomas Peterson

According to our database, Thomas Peterson authored at least 6 papers between 2019 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Spiking Neural Networks in Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Keshab K. Parhi, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

ACM Trans. Archit. Code Optim., 2021

Seeds of SEED: H-CRAM: In-memory Homomorphic Search Accelerator using Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

2020

An Inference and Learning Engine for Spiking Neural Networks in Computational RAM (CRAM).

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Keshab K. Parhi, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

CoRR, 2020

CRAFFT: High Resolution FFT Accelerator In Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed Iqbal Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Using Spin-Hall MTJs to Build an Energy-Efficient In-memory Computation Platform.

Masoud Zabihi, Zhengyang Zhao, D. C. Mahendra, Zamshed I. Chowdhury, Salonik Resch, Thomas Peterson, Ulya R. Karpuzcu, Jianping Wang, Sachin S. Sapatnekar

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

True In-memory Computing with the CRAM: From Technology to Applications.

Masoud Zabihi, Zhengyang Zhao, Zamshed I. Chowdhury, Salonik Resch, Mahendra DC, Thomas Peterson, Ulya R. Karpuzcu, Jianping Wang, Sachin S. Sapatnekar

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019