Jianping Wang
Orcid: 0000-0003-2815-6624Affiliations:
- University of Minnesota, Department of Electrical and Computer Engineering, Minneapolis, MN, USA
- Chinese Academy of Sciences, Beijing, China (PhD 1995)
According to our database1,
Jianping Wang
authored at least 37 papers
between 2013 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Sensors, 2023
Experimental demonstration of magnetic tunnel junction-based computational random-access memory.
CoRR, 2023
Impact of microcoil shape and the efficacy of soft magnetic material cores in focal micromagnetic neurostimulation.
Proceedings of the 11th International IEEE/EMBS Conference on Neural Engineering, 2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
PimCity: A Compute in Memory Substrate featuring both Row and Column Parallel Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023
2022
Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions.
ACM Trans. Embed. Comput. Syst., September, 2022
IEEE Trans. Emerg. Top. Comput., 2022
Frequency and Amplitude Optimizations for Magnetic Particle Spectroscopy Applications.
CoRR, 2022
2021
ACM Trans. Archit. Code Optim., 2021
CoRR, 2021
Magnetic Particle Spectroscopy (MPS) with One-stage Lock-in Implementation for Magnetic Bioassays with Improved Sensitivities.
CoRR, 2021
Seeds of SEED: H-CRAM: In-memory Homomorphic Search Accelerator using Spintronic Computational RAM.
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
2020
ACM Trans. Archit. Code Optim., 2020
An Inference and Learning Engine for Spiking Neural Networks in Computational RAM (CRAM).
CoRR, 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping.
IEEE Trans. Computers, 2019
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
CoRR, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
2015
Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor.
Proc. IEEE, 2015
A technology-agnostic MTJ SPICE model with user-defined dimensions for STT-MRAM scalability studies.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Viscosity effect on the brownian relaxation based detection for immunoassay applications.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014
2013
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory.
IEEE J. Solid State Circuits, 2013