Tianxiang Shao

According to our database1, Tianxiang Shao authored at least 6 papers between 2019 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages.
IEEE Trans. Very Large Scale Integr. Syst., 2021

2020
TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Modeling and Designing of a PVT Auto-tracking Timing-speculative SRAM.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

TYMER: A Yield-based Performance Model for Timing-speculation SRAM.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM.
IEEE Access, 2019

RRS cache: a low voltage cache based on timing speculation SRAM with a reuse-aware cacheline remapping mechanism.
Proceedings of the International Symposium on Memory Systems, 2019


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