Tingran Chen
According to our database1,
Tingran Chen authored at least 6 papers
between 2022 and 2026.
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Bibliography
2026
STM-CIM: A 2427 TOPS/W Signed Compute-in-Memory with Analog-Domain Top-k and Matrix Transpose for CNN & Transformer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
SuperCIM: A Charge-domain CIM with 3D Parallelism Reconfigurability based on Asynchronous NoC Protocol.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
ACSNN: A 61.25 TOPS/W, 1.65 ns delay SNN Processor that combines CIM-inspired Synapse and Asynchronous Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
PipeCIM: A High-Throughput Computing-In-Memory Microprocessor With Nested Pipeline and RISC-V Extended Instructions.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2024
DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024
2022
CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022