Junzhan Liu

According to our database, Junzhan Liu authored at least 5 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets.

Lichuan Luo, Erya Deng, Dijun Liu, Zhen Wang, Weiliang Huang, He Zhang, Xiao Liu, Jinyu Bai, Junzhan Liu, Youguang Zhang, Wang Kang

IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

2023

A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks.

Lichuan Luo, Wang Kang, Junzhan Liu, He Zhang, Youguang Zhang, Dijun Liu, Peng Ouyang

IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

2022

HD-CIM: Hybrid-Device Computing-In-Memory Structure Based on MRAM and SRAM to Reduce Weight Loading Energy of Neural Networks.

He Zhang, Junzhan Liu, Jinyu Bai, Sai Li, Lichuan Luo, Shaoqian Wei, Jianxin Wu, Wang Kang

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory.

He Zhang, Linjun Jiang, Jianxin Wu, Tingran Chen, Junzhan Liu, Wang Kang, Weisheng Zhao

Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021

A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter Output.

He Zhang, Junzhan Liu, Kang Wang, Yunqian Fan, Shufeng Fu, Jinyu Bai, Biao Pan, Yongpan Liu, Weisheng Zhao

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021