Tobias Kenter
Orcid: 0000-0002-5088-0267
According to our database1,
Tobias Kenter
authored at least 44 papers
between 2008 and 2024.
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Bibliography
2024
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL.
CoRR, 2024
Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures.
Proceedings of the 12th International Workshop on OpenCL and SYCL, 2024
2023
Breaking the exascale barrier for the electronic structure problem in <i>ab-initio</i> molecular dynamics.
Int. J. High Perform. Comput. Appl., September, 2023
Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-switched Inter-FPGA Networks.
ACM Trans. Reconfigurable Technol. Syst., June, 2023
Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline.
Proceedings of the High Performance Computing - 38th International Conference, 2023
Proceedings of the Platform for Advanced Scientific Computing Conference, 2023
Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes.
Proceedings of the Platform for Advanced Scientific Computing Conference, 2023
Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation.
Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2023
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023
2022
ACM Trans. Reconfigurable Technol. Syst., 2022
Towards electronic structure-based <i>ab-initio</i> molecular dynamics simulations with hundreds of millions of atoms.
Parallel Comput., 2022
In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL.
J. Parallel Distributed Comput., 2022
Concurr. Comput. Pract. Exp., 2022
A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.
Proceedings of the HPC Asia 2022: International Conference on High Performance Computing in Asia-Pacific Region, Virtual Event, Japan, January 12, 2022
2021
A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays.
CoRR, 2021
Enabling Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.
CoRR, 2021
Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA.
Proceedings of the PASC '21: Platform for Advanced Scientific Computing Conference, 2021
High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.
Proceedings of the 35th IEEE International Parallel and Distributed Processing Symposium, 2021
Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021
2020
CoRR, 2020
Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of the HPCChallenge Benchmark Suite.
CoRR, 2020
Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite.
Proceedings of the 2020 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2020
Efficient Ab-Initio Molecular Dynamic Simulations by Offloading Fast Fourier Transformations to FPGAs.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
HighPerMeshes - A Domain-Specific Language for Numerical Algorithms on Unstructured Grids.
Proceedings of the Euro-Par 2020: Parallel Processing Workshops, 2020
2019
ACM Trans. Archit. Code Optim., 2019
OpenCL Implementation of Cannon's Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2019
2018
Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2018
OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018
2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017
2016
PhD thesis, 2016
Potential and methods for embedding dynamic offloading decisions into application code.
Comput. Electr. Eng., 2016
Proceedings of the Ausgezeichnete Informatikdissertationen 2016, 2016
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Exploring Trade-Offs between Specialized Dataflow Kernels and a Reusable Overlay in a Stereo Matching Case Study.
Int. J. Reconfigurable Comput., 2015
2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014
Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014
2013
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013
2012
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Turning control flow graphs into function calls: Code generation for heterogeneous architectures.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012
2011
Performance estimation framework for automated exploration of CPU-accelerator architectures.
Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011
2008
The GOmputer: Accelerating GO with FPGAs.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008