James Price

According to our database1, James Price authored at least 25 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Non-ergodicity in reinforcement learning: robustness via ergodicity transformations.
CoRR, 2023

Distinguishing Risk Preferences using Repeated Gambles.
CoRR, 2023

2022
highRES-Europe: The high spatial and temporal Resolution Electricity System model for Europe.
SoftwareX, 2022

2020
Development of a holistic model for the management of an enterprise's information assets.
Int. J. Inf. Manag., 2020

Benchmarking the first generation of production quality Arm-based supercomputers.
Concurr. Comput. Pract. Exp., 2020

2019
Exploiting Task Parallelism with OpenCL: A Case Study.
J. Signal Process. Syst., 2019

A performance analysis of the first generation of HPC-optimized Arm processors.
Concurr. Comput. Pract. Exp., 2019

Performance Portability across Diverse Computer Architectures.
Proceedings of the 2019 IEEE/ACM International Workshop on Performance, 2019

2018
Tools and techniques for programming many-core architectures.
PhD thesis, 2018

Death by a thousand cuts: behaviour and attitudes that inhibit enterprise information asset management.
Inf. Res., 2018

Application-based fault tolerance techniques for sparse matrix solvers.
Int. J. High Perform. Comput. Appl., 2018

Evaluating attainable memory bandwidth of parallel programming models via BabelStream.
Int. J. Comput. Sci. Eng., 2018

2017
Managing information in law firms: changes and challenges.
Inf. Res., 2017

Exploiting Auto-tuning to Analyze and Improve Performance Portability on Many-Core Architectures.
Proceedings of the High Performance Computing, 2017

Evaluation of Asynchronous Offloading Capabilities of Accelerator Programming Models for Multiple Devices.
Proceedings of the Accelerator Programming Using Directives - 4th International Workshop, 2017

Analyzing and improving performance portability of OpenCL applications via auto-tuning.
Proceedings of the 5th International Workshop on OpenCL, 2017

Application-Based Fault Tolerance Techniques for Fully Protecting Sparse Matrix Solvers.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

2016
GPU-STREAM v2.0: Benchmarking the Achievable Memory Bandwidth of Many-Core Processors Across Diverse Parallel Programming Models.
Proceedings of the High Performance Computing, 2016

Pragmatic Performance Portability with OpenMP 4.x.
Proceedings of the OpenMP: Memory, Devices, and Tasks, 2016

2015
High performance <i>in silico</i> virtual drug screening on many-core processors.
Int. J. High Perform. Comput. Appl., 2015

Surface Registration in the Presence of Missing Patches and Topology Change.
Proceedings of the Medical Image Understanding and Analysis, 2015

Improving Auto-Tuning Convergence Times with Dynamically Generated Predictive Performance Models.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

Oclgrind: an extensible OpenCL device simulator.
Proceedings of the 3rd International Workshop on OpenCL, 2015

Information Asset Management Capability: The Role of the CIO.
Proceedings of the 21st Americas Conference on Information Systems, 2015

2014
On the Performance Portability of Structured Grid Codes on Many-Core Computer Architectures.
Proceedings of the Supercomputing - 29th International Conference, 2014


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