Tomas Pecenka

According to our database, Tomas Pecenka authored at least 6 papers between 2005 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Evolution of synthetic RTL benchmark circuits with predefined testability.

Tomas Pecenka, Lukás Sekanina, Zdenek Kotásek

ACM Trans. Design Autom. Electr. Syst., 2008

Measuring CADeT Performance by Means of FITTest_BENCH06 Benchmark Circuits.

Josef Strnadel, Tomas Pecenka, Zdenek Kotásek

Comput. Informatics, 2008

2006

Testability Estimation Based on Controllability and Observability Parameters.

Tomas Pecenka, Josef Strnadel, Zdenek Kotásek, Lukás Sekanina

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Diagnostic Properties.

Tomas Pecenka, Zdenek Kotásek, Lukás Sekanina

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005

NetFlow Probe Intended for High-Speed Networks.

Martin Zádník, Tomas Pecenka, Jan Korenek

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties.

Tomas Pecenka, Zdenek Kotásek, Lukás Sekanina, Josef Strnadel

Proceedings of the 2005 NASA / DoD Conference on Evolvable Hardware (EH 2005), 29 June, 2005