Toshiaki Nishimoto

According to our database1, Toshiaki Nishimoto authored at least 2 papers between 1990 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

1999
A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications.
IEEE J. Solid State Circuits, 1999

1990
An 80-ns 1-Mb flash memory with on-chip erase/erase-verify controller.
IEEE J. Solid State Circuits, October, 1990


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