Hideaki Kurata

According to our database1, Hideaki Kurata authored at least 9 papers between 1999 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2008
Memory at VLSI Circuits Symposium.
IEEE J. Solid State Circuits, 2008

A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model.
IEICE Trans. Electron., 2008

2007
Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node.
IEEE J. Solid State Circuits, 2007

Selective-Capacitance Constant-Charge-Injection Programming Scheme for High-Speed Multilevel AG-AND Flash Memories.
IEICE Trans. Electron., 2007

A 126 mm<sup>2</sup> 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology.
IEICE Trans. Electron., 2007

2006
A 130-nm CMOS 95-mm<sup>2</sup> 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput.
IEICE Trans. Electron., 2006

2005
Constant-charge-injection programming: a novel high-speed programming method for multilevel flash memories.
IEEE J. Solid State Circuits, 2005

2002
Intelligent Interface and Control of an Exoskeletal Robot for Human Shoulder Motion Support Considering Subject's Arm Posture.
Proceedings of the 2002 IEEE International Conference on Robotics and Automation, 2002

1999
A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications.
IEEE J. Solid State Circuits, 1999


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