Toshiharu Takaramoto

According to our database, Toshiharu Takaramoto authored at least 5 papers between 2011 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Measurements and Simulation of Sensitivity of Differential-Pair Transistors against Substrate Voltage Variation.

Satoshi Takaya, Yoji Bando, Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Masaaki Souda, Shigetaka Kumashiro, Tohru Mogami, Makoto Nagata

IEICE Trans. Electron., 2013

2012

On-Chip In-Place Measurements of V_th and Signal/Substrate Response of Differential Pair Transistors.

Yoji Bando, Satoshi Takaya, Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Masaaki Souda, Shigetaka Kumashiro, Tohru Mogami, Makoto Nagata

IEICE Trans. Electron., 2012

2011

On-Chip Single Tone Pseudo-Noise Generator for Analog IP Noise Tolerance Measurement.

Masaaki Souda, Yoji Bando, Satoshi Takaya, Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Shigetaka Kumashiro, Tohru Mogami, Makoto Nagata

IEICE Trans. Electron., 2011

A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits.

Yoji Bando, Satoshi Takaya, Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Masaaki Souda, Shigetaka Kumashiro, Tohru Mogami, Makoto Nagata

IEICE Trans. Electron., 2011

Accurate analysis of substrate sensitivity of active transistors in an analog circuit.

Satoshi Takaya, Yoji Bando, Toru Ohkawa, Toshiharu Takaramoto, Toshio Yamada, Masaaki Souda, Shigetaka Kumashiro, Tohru Mogami, Makoto Nagata

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011