Tupei Chen

Orcid: 0000-0002-1098-9575

Affiliations:
  • Nanyang Technological University, School of Electrical and Electronic Engineering, Singapore


According to our database1, Tupei Chen authored at least 23 papers between 2005 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2025
A 2T1MTJ-Based In-Memory Computing Macro With Time-Domain Accumulation and Ramp-Type Readout.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2025

Casing Collar Identification using AlexNet-based Neural Networks for Depth Measurement in Oil and Gas Wells.
CoRR, November, 2025

Realization of Precise Perforating Using Dynamic Threshold and Physical Plausibility Algorithm for Self-Locating Perforating in Oil and Gas Wells.
CoRR, September, 2025

An Image Encryption Algorithm Based on HNN with Memristor.
Int. J. Bifurc. Chaos, 2025

2024
Wearable Sensors, Data Processing, and Artificial Intelligence in Pregnancy Monitoring: A Review.
Sensors, October, 2024

Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.
IEEE J. Solid State Circuits, February, 2024

2023
Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory.
Sensors, March, 2023

An Area- and Energy-Efficient Spiking Neural Network With Spike-Time-Dependent Plasticity Realized With SRAM Processing-in-Memory Macro and On-Chip Unsupervised Learning.
IEEE Trans. Biomed. Circuits Syst., February, 2023

2021
Quantized STDP-based online-learning spiking neural network.
Neural Comput. Appl., 2021

Design of a constant loop bandwidth phase-locked loop based on artificial neural network.
IEICE Electron. Express, 2021

2020
Application of Deep Compression Technique in Spiking Neural Network Chip.
IEEE Trans. Biomed. Circuits Syst., 2020

An energy-efficient deep convolutional neural networks coprocessor for multi-object detection.
Microelectron. J., 2020

STBNN: Hardware-friendly spatio-temporal binary neural network with high pattern recognition accuracy.
Neurocomputing, 2020

Design of AM Self-Capacitive Transparent Touch Panel Based on a-IGZO Thin-Film Transistors.
IEEE Access, 2020

3D Geometric Engineering of the Double Wedge-Like Electrodes for Filament-Type RRAM Device Performance Improvement.
IEEE Access, 2020

2019
A Neuromorphic-Hardware Oriented Bio-Plausible Online-Learning Spiking Neural Network Model.
IEEE Access, 2019

Implementation of a Low Noise Amplifier With Self-Recovery Capability.
IEEE Access, 2019

Study of Recall Time of Associative Memory in a Memristive Hopfield Neural Network.
IEEE Access, 2019

Design of a Neural Network-Based VCO With High Linearity and Wide Tuning Range.
IEEE Access, 2019

2018
Predicting House Price With a Memristor-Based Artificial Neural Network.
IEEE Access, 2018

Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network.
IEEE Access, 2018

2005
Dynamic NBTI lifetime model for inverter-like waveform.
Microelectron. Reliab., 2005

Mechanism of nitrogen-enhanced negative bias temperature instability in pMOSFET.
Microelectron. Reliab., 2005


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