Ulysse Beaugnon

According to our database1, Ulysse Beaugnon authored at least 9 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
TelaMalloc: Efficient On-Chip Memory Allocation for Production Machine Learning Accelerators.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Weaving Synchronous Reactions into the Fabric of SSA-form Compilers.
ACM Trans. Archit. Code Optim., 2022

A Transferable Approach for Partitioning Machine Learning Models on Multi-Chip-Modules.
Proceedings of Machine Learning and Systems 2022, 2022

2019
Efficient Code Generation for Hardware Accelerators by Refining Partially Specified Implementations. (Génération de code efficace pour accélérateurs matériels par raffinement d'implémentations partiellement spécifiées).
PhD thesis, 2019

On the Representation of Partially Specified Implementations and its Application to the Optimization of Linear Algebra Kernels on GPU.
CoRR, 2019

2017
Optimization space pruning without regrets.
Proceedings of the 26th International Conference on Compiler Construction, 2017

2016
In-Place Update in a Dataflow Synchronous Language: A Retiming-Enabled Language Experiment.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

2015
PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
VOBLA: a vehicle for optimized basic linear algebra.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014


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