Umar Afzaal
Orcid: 0000-0003-1502-8607
According to our database1,
Umar Afzaal
authored at least 10 papers
between 2017 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
An Island Style Multi-Objective Evolutionary Framework for Synthesis of Memristor-Aided Logic.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
2023
IEEE Trans. Evol. Comput., April, 2023
Multisource Clock Tree Synthesis Through Sink Clustering and Fast Clock Latency Prediction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2020
Microprocess. Microsystems, 2020
Proceedings of the International Conference on Information and Communication Technology Convergence, 2020
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
2019
DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic Updates.
IEEE Trans. Very Large Scale Integr. Syst., 2019
2018
High-Speed Configuration Strategy for Configurable Logic Block-Based TCAM Architecture on FPGA.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Effect of FPGA Circuit Implementation on Error Detection Using Logic Implication Checking.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017