V. Moreda

According to our database, V. Moreda authored at least 3 papers between 1997 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1999

A Scan-BIST Structure to Test Delay Faults in Sequential Circuits.

Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch, Arnaud Virazel

J. Electron. Test., 1999

1998

A BIST Structure to Test Delay Faults in a Scan Environment.

Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch, Arnaud Virazel

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997

An optimized BIST test pattern generator for delay testing.

Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997