Valeria Bragaglia

According to our database1, Valeria Bragaglia authored at least 11 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
All-in-One Analog AI Accelerator: On-Chip Training and Inference with Conductive-Metal-Oxide/HfOx ReRAM Devices.
CoRR, February, 2025

Edge Training and Inference with Analog ReRAM Technology for Hand Gesture Recognition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Hardware Implementation of Ring Oscillator Networks Coupled by BEOL Integrated ReRAM for Associative Memory Tasks.
Proceedings of the IEEE International Memory Workshop, 2025

2024
Highly Reproducible and CMOS-compatible VO2-based Oscillators for Brain-inspired Computing.
CoRR, 2024

Read Noise Analysis in Analog Conductive-Metal-Oxide/HfOx ReRAM Devices.
Proceedings of the Device Research Conference, 2024

2023
A BEOL Compatible, 2-Terminals, Ferroelectric Analog Non-Volatile Memory.
CoRR, 2023

Physical modeling and design rules of analog Conductive Metal Oxide-HfO2 ReRAM.
Proceedings of the IEEE International Memory Workshop, 2023

2022
Role of Conductive-Metal-Oxide to HfOx, Interfacial Layer on the Switching Properties of Bilayer TaOx/HfOx ReRAM.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

Equivalent electrical circuit modelling of a TaOx/HfOx based RRAM with optimized resistance window and multilevel states.
Proceedings of the Device Research Conference, 2022

2021
A Back-End-Of-Line Compatible, Ferroelectric Analog Non-Volatile Memory.
Proceedings of the IEEE International Memory Workshop, 2021

2020
A back-end, CMOS compatible ferroelectric Field Effect Transistor for synaptic weights.
CoRR, 2020


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