Varun Venkitaraman

According to our database, Varun Venkitaraman authored at least 7 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

SCAM: Secure Shared Cache Partitioning Scheme to Enhance Throughput of CMPs.

Varun Venkitaraman, Rishab Ravi, Tejeshwar Bhagatsing Thorawade, Nirmal Kumar Boran, Virendra Singh

Proceedings of the 22nd International Conference on Security and Cryptography, 2025

RRR: Robust runtime reconfigurable shared cache management scheme for GPGPUs.

Varun Venkitaraman, Shrasti Bhargava, Tejeshwar Bhagatsing Thorawade, K. Kokkiligadda, Rahul Kumar, Virendra Singh

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

MIST: Many-ISA Scheduling Technique for Heterogeneous-ISA Architectures.

Prakhar Diwan, Suryakant Toraskar, Varun Venkitaraman, Nirmal Kumar Boran, Chandramani Chaudhary, Virendra Singh

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

S-Clflush: Securing Against Flush-based Cache Timing Side-Channel Attacks.

Tejeshwar Bhagatsing Thorawade, Prajakta Yeola, Varun Venkitaraman, Virendra Singh

Proceedings of the 36th IEEE International Symposium on Computer Architecture and High Performance Computing, 2024

2022

CAR: Community Aware Graph Reordering for Efficient Cache Utilization in Graph Analytics.

Shubham Singhania, Neelam Sharma, Varun Venkitaraman, Chandan Kumar Jha

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

Data-Aware Cache Management for Graph Analytics.

Neelam Sharma, Varun Venkitaraman, Newton, Vikash Kumar, Shubham Singhania, Chandan Kumar Jha

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

DAM: Deadblock Aware Migration Techniques for STT-RAM-Based Hybrid Caches.

Arindam Sarkar, Newton Singh, Varun Venkitaraman, Virendra Singh

IEEE Comput. Archit. Lett., 2021