Vincent Condito

According to our database, Vincent Condito authored at least 3 papers between 1995 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

40-43-Gb/s OC-768 16: 1 MUX/CMU chipset with SFI-5 compliance.

Hai Tao, Derek K. Shaeffer, Min Xu, Saied Benyamin, Vincent Condito, Steffen Kudszus, Qinghung Lee, Adrian Ong, Arvin Shahani, Xiaomin Si, Wayne Wong, Maurice Tarsia

IEEE J. Solid State Circuits, 2003

A 40-43-Gb/s clock and data recovery IC with integrated SFI-5 1: 16 demultiplexer in SiGe technology.

Adrian Ong, Saied Benyamin, Jason Cancio, Vincent Condito, Tad Labrie, Qinghung Lee, John Paul Mattia, Derek K. Shaeffer, Arvin Shahani, Xiaomin Si, Hai Tao, Maurice Tarsia, Wayne Wong, Min Xu

IEEE J. Solid State Circuits, 2003

1995

A single-chip 9-32 mb/s read/write channel for disk-drive applications.

Maurizio Zuffada, Roberto Alini, Paolo Colletti, Marco Demicheli, Marco Gregori, David Moloney, Salvatore Portaluri, Fabrizio Sacchi, Sadik O. Arf, Vincent Condito, Rinaldo Castello

IEEE J. Solid State Circuits, June, 1995