Rinaldo Castello

Orcid: 0000-0002-8375-3862

According to our database1, Rinaldo Castello authored at least 105 papers between 1992 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1999, "For contributions to the design of integrated filters.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
A Wide Bandwidth, Low Power, Linear Quantized-Analog VGA in 28 nm CMOS Technology and 1.2V Supply.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

A 36 GHz Bandwidth, High Linear, Low Power, Driver Modulator, in 28 nm CMOS Technology Based on Quantized-Analog Signal Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

An Interferer-Tolerant RX with Translational Positive Feedback for 5G NR Applications Achieving 3.4 dB NF and 18 dBm OOB IIP3.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter.
IEEE J. Solid State Circuits, 2022

An FDD Auxiliary Receiver with a Highly Linear Low Noise Amplifier.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

A 58 GHz Bandwidth, and less than 1.8% THD, Mach-Zehnder Driver, in 28 nm CMOS Technology.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

Reminiscing through 40 years of CMOS analog circuit design: from audio to GHz.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

Filtering Trans-Impedance Amplifiers: from mW of Power to GHz of Bandwidth.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021
A Highly Linear SAW-Less Noise-Canceling Receiver With Shared TIAs Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A 2<sup>nd</sup> Order Current-Mode Filter with 14dB Variable Gain and 650MHz to 1GHz Tuning-Range in 28nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 17 mW 33 dBm IB-OIP3 0.5-1.5 GHz Bandwidth TIA Based on an Inductor-Stabilized OTA.
Proceedings of the 47th ESSCIRC 2021, 2021

A 400-µW Low-IF IoT Receiver Front-End with Tunable Charge-Sharing Complex Filter.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA.
IEEE J. Solid State Circuits, 2020

2019
A 1.5-2.8 GHz current-mode LNTA achieving >25 dBm IIP3 and +8 dBm P-1dB gain compression.
Microelectron. J., 2019

A 150-MHz TIA with un-Conventional OTA Stabilization Technique via Local Active Feed-Back.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

A 260-MHz RF Bandwidth Mixer-First Receiver With Third-Order Current-Mode Filtering TIA.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

A Wideband Saw-Less Transmitter Operating in Closed-Loop With Embedded N-Path Filtering.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

A Sub-0.6V, 330 µW, 0.15 mm<sup>2</sup> Receiver Front-End for Bluetooth Low Energy (BLE) in 22 nm FD-SOI with Zero External Components.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
Design and Analysis of 2.4 GHz 30~µW CMOS LNAs for Wearable WSN Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Analysis and Design of a 20-MHz Bandwidth, 50.5-dBm OOB-IIP3, and 5.4-mW TIA for SAW-Less Receivers.
IEEE J. Solid State Circuits, 2018

An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands.
IEEE J. Solid State Circuits, 2018

A TVWS receiver with balanced output self-calibrated IIP2 LNTA employing a low-noise current multiplier.
Integr., 2018

A Sub-IV, 72 μW Stacked LNA-VCO for Wireless Sensor Network Applications.
Proceedings of the 14th Conference on Ph.D. Research in Microelectronics and Electronics, 2018

A Mixer-1st Auxiliary Receiver for Full-Duplex Self-Interference Cancellation.
Proceedings of the 2018 New Generation of CAS, 2018

A Sub-1V, 220 μW Receiver Frontend for Wearable Wireless Sensor Network Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A SAW-Less 2.4-GHz Receiver Front-End With 2.4-mA Battery Current for SoC Coexistence.
IEEE J. Solid State Circuits, 2017

A 30μW, 3.3dB NF CMOS LNA for wearable WSN applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 0.7-2 GHz auxiliary receiver with enhanced compression for SAW-less FDD.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
Highly linear TIA for SAW-less FDD receivers.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
Analysis and Design of a 195.6 dBc/Hz Peak FoM P-N Class-B Oscillator With Transformer-Based Tail Filtering.
IEEE J. Solid State Circuits, 2015

A 2.4GHz low-power SAW-less receiver for SoC coexistence.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A 1.7-2.1GHz +23dBm TX power compatible blocker tolerant FDD receiver with integrated duplexer in 28nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers.
IEEE J. Solid State Circuits, 2014

An Intuitive Analysis of Phase Noise Fundamental Limits Suitable for Benchmarking LC Oscillators.
IEEE J. Solid State Circuits, 2014

A Current-Mode, Low Out-of-Band Noise LTE Transmitter With a Class-A/B Power Mixer.
IEEE J. Solid State Circuits, 2014

A low power/noise emission LTE fully class A/B transmitter with a programmable output balun.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014


A 195.6dBc/Hz peak FoM P-N class-B oscillator with transformer-based tail filtering.
Proceedings of the ESSCIRC 2014, 2014

2013
An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A 40-MHz-to-1-GHz Fully Integrated Multistandard Silicon Tuner in 80-nm CMOS.
IEEE J. Solid State Circuits, 2013

SAW-Less Analog Front-End Receivers for TDD and FDD.
IEEE J. Solid State Circuits, 2013

An LTE transmitter using a class-A/B power mixer.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A low out-of-band noise LTE transmitter with current-mode approach.
Proceedings of the ESSCIRC 2013, 2013

2012
A 2G/3G Cellular Analog Baseband Based on a Filtering ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A Dither-Less All Digital PLL for Cellular Transmitters.
IEEE J. Solid State Circuits, 2012

A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Corrections to "Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping" [Sep 10 1770-1780].
IEEE J. Solid State Circuits, 2011

A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
Two-Dimensions Vernier Time-to-Digital Converter.
IEEE J. Solid State Circuits, 2010

Low-Power Quadrature Receivers for ZigBee (IEEE 802.15.4) Applications.
IEEE J. Solid State Circuits, 2010

Current-Mode, WCDMA Channel Filter With In-Band Noise Shaping.
IEEE J. Solid State Circuits, 2010

A Class-G Headphone Amplifier in 65 nm CMOS Technology.
IEEE J. Solid State Circuits, 2010

Capacitive Degeneration in LC-Tank Oscillator for DCO Fine-Frequency Tuning.
IEEE J. Solid State Circuits, 2010

Class-G headphone driver in 65nm CMOS technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

3.3GHz DCO with a frequency resolution of 150Hz for All-digital PLL.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A 1.25mW 75dB-SFDR CT filter with in-band noise reduction.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A VDSL2 CPE AFE in 0.15µm CMOS with integrated line driver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Time to digital converter based on a 2-dimensions Vernier architecture.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A Reconfigurable Narrow-Band MB-OFDM UWB Receiver Architecture.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Analysis and Design of Configurable LNAs in Feedback Common-Gate Topologies.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

A 2.4 GHz 3.6mW 0.35mm<sup>2</sup> Quadrature Front-End RX for ZigBee and WPAN Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixer.
Proceedings of the ESSCIRC 2008, 2008

2006
A fully digital fast convergence algorithm for nonlinearity correction in multistage ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell.
IEEE J. Solid State Circuits, 2006

A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier.
IEEE J. Solid State Circuits, 2006

A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner.
IEEE J. Solid State Circuits, 2005

2004
A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications.
IEEE J. Solid State Circuits, 2004

2003
A 35-mW 3.6-mm2 fully integrated 0.18-μm CMOS GPS radio.
IEEE J. Solid State Circuits, 2003

A 15 mW, 70 kHz 1/f corner direct conversion CMOS receiver.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

An UMTS ΣΔ fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2001
Implementation of a CMOS LNA plus mixer for GPS applications with no external components.
IEEE Trans. Very Large Scale Integr. Syst., 2001

A 2-dB noise figure 900-MHz differential CMOS LNA.
IEEE J. Solid State Circuits, 2001

An eighth-order CMOS low-pass filter with 30-120 MHz tuning range and programmable boost.
IEEE J. Solid State Circuits, 2001

2000
A 1.3 GHz low-phase noise fully tunable CMOS LC VCO.
IEEE J. Solid State Circuits, 2000

A 200-Ms/s 10-mW switched-capacitor filter in 0.5-μm CMOS technology.
IEEE J. Solid State Circuits, 2000

An 8mA, 3.8dB NF, 40dB gain CMOS front-end for GPS applications.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Solutions for image rejection CMOS LNA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A 1 V 1.2 μW 4th order bandpass switched-opamp SC filter for a cardiac pacer sensing stage.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

High-frequency CMOS low-power single-branch continuous-time filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A 1 mA, -120.5 dbc/Hz at 600 kHz from 1.9 GHz fully tuneable LC CMOS VCO.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
A low-voltage topology for CMOS RF mixers.
IEEE Trans. Consumer Electron., 1999

A 1.3 GHz CMOS VCO with 28% frequency tuning.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999


1998
Measurement and modeling of Si integrated inductors.
IEEE Trans. Instrum. Meas., 1998

A versatile high-speed bipolar charge-sensitive preamplifier for calorimeter applications.
IEEE J. Solid State Circuits, 1998

1997
A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz.
IEEE J. Solid State Circuits, 1997

A 70-mW seventh-order filter with 7-50 MHz cutoff frequency and programmable boost and group delay equalization.
IEEE J. Solid State Circuits, 1997

A 10.7-MHz BiCMOS high-Q double-sampled SC bandpass filter.
IEEE J. Solid State Circuits, 1997

A 100-MHz 4-mW four-quadrant BiCMOS analog multiplier.
IEEE J. Solid State Circuits, 1997

A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing.
IEEE J. Solid State Circuits, 1997

A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo.
IEEE J. Solid State Circuits, 1997

1996
A PLL-based frequency synthesizer for 160-MHz double-sampled SC filters.
IEEE J. Solid State Circuits, 1996

A readout channel with 1 nF fully integrated capacitor for AMS space experiment.
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1995
A 15 MHz 20 mW BiCMOS switched-capacitor biquad operating with 150 Ms/s sampling frequency.
IEEE J. Solid State Circuits, December, 1995

A single-chip 9-32 mb/s read/write channel for disk-drive applications.
IEEE J. Solid State Circuits, June, 1995

1994
Design of High-Frequency BiCMOS Continuous-Time Filters with Low-Output Impedance Transconductor.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

High Speed Monolithic Read-Out System for High Energy Physics Experiments.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
Novel Linearizaiton Circuit for BiCMOS Transconductors Used in High Frequency OTA-C Filters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Exact Design of High-frequency SC Circuits with Low-gain Op Amps.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

High-speed BiCMOS Operational Amplifier for Switched-capacitor Circuits.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992
Zero placement technique for iir switched capacitor anti-aliasing decimators.
Int. J. Circuit Theory Appl., 1992


  Loading...