Marco Demicheli

According to our database, Marco Demicheli authored at least 6 papers between 1995 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 11.3-ppm/°C, Two Temperature Points Trimmed Current Generator for Precise RC Oscillators.

Marko Dukic, Antonio Galimberti, Marco Demicheli, Edoardo Bonizzoni

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2001

An eighth-order CMOS low-pass filter with 30-120 MHz tuning range and programmable boost.

Giacomino Bollati, Stefano Marchese, Marco Demicheli, Rinaldo Castello

IEEE J. Solid State Circuits, 2001

2000

A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi.

Giacomino Bollati, Angelo Dati, Giorgio Betti, Ivan Bietti, Francesco Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Daniele Ottini, Valerio Pisati, Francesco Rezzi, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

A 450 Mbit/s EPR4 PRML read/write channel.

Marco Demicheli, Giacomino Bollati, Paolo Gadducci, L. Affortunati, Roberto Alini, G. Betti, I. Bietti, F. Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Stefano Marchese, D. Ottini, Valerio Pisati, Salvatore Portaluri, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997

A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo.

Roberto Alini, Giorgio Betti, Ivan Bietti, Giacomino Bollati, Francesco Brianti, Angelo Dati, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Emanuele Marconetti, Valerio Pisati, Maurizio Zuffada, Rinaldo Castello, Fereidoon Heydari, Peter Gillen, Gerry Maguire, Marcus Marrow, Stephen McDonagh, Fergus O'Brien, Jerry O'Brien, Niall O'hEarcain, Deirdre Reddy, Lisa Fredrickson, Dennis Stone, LeRoy Volz

IEEE J. Solid State Circuits, 1997

1995

A single-chip 9-32 mb/s read/write channel for disk-drive applications.

Maurizio Zuffada, Roberto Alini, Paolo Colletti, Marco Demicheli, Marco Gregori, David Moloney, Salvatore Portaluri, Fabrizio Sacchi, Sadik O. Arf, Vincent Condito, Rinaldo Castello

IEEE J. Solid State Circuits, June, 1995