Vishnuram Abhinav

According to our database1, Vishnuram Abhinav authored at least 3 papers between 2015 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

2015
Methodology for optimizing ESD protection for high speed LVDS based I/Os.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015


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