Vittoriano Muttillo

Orcid: 0000-0002-2220-8326

According to our database1, Vittoriano Muttillo authored at least 30 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
SystemC-based Co-Simulation/Analysis for System-Level Hardware/Software Co-Design.
Comput. Electr. Eng., September, 2023

2022
AIDOaRt: AI-augmented Automation for DevOps, a model-based framework for continuous development in Cyber-Physical Systems.
Microprocess. Microsystems, October, 2022

2021
Statement-Level Timing Estimation for Embedded System Design Using Machine Learning Techniques.
Proceedings of the ICPE '21: ACM/SPEC International Conference on Performance Engineering, 2021

Model-Based HW/SW Co-Design Methodology for UAV Systems Development.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

2020
<i>SystemC</i>-based electronic system-level design space exploration environment for dedicated heterogeneous multi-processor systems.
Microprocess. Microsystems, 2020

An early-stage statement-level metric for energy characterization of embedded processors.
Microprocess. Microsystems, 2020

Towards the Design of Microcontroller Based Embedded Sensory systems with a Five-Parameter Single Diode Estimation Method for Photovoltaic Panels.
Proceedings of the 2020 IEEE International Workshop on Metrology for Industry 4.0 & IoT, 2020

A Low Cost and Flexible Power Line Communication Sensory System for Home Automation.
Proceedings of the 2020 IEEE International Workshop on Metrology for Industry 4.0 & IoT, 2020

An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded Systems.
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2020

Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
Benchmarking Analysis and Characterization of Hypervisors for Space Multicore Systems.
J. Aerosp. Inf. Syst., November, 2019

HW/SW co-design methodology and framework for mixed-criticality and real-time embedded systems.
PhD thesis, 2019

The AQUAS ECSEL Project Aggregated Quality Assurance for Systems: Co-Engineering Inside and Across the Product Life Cycle.
Microprocess. Microsystems, 2019

J4CS: An Early-Stage Statement-Level Metric for Energy Consumption of Embedded SW.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
CC4CS: an Off-the-Shelf Unifying Statement-Level Performance Metric for HW/SW Technologies.
Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018

Criticality-aware Design Space Exploration for Mixed-Criticality Embedded Systems.
Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018

HEPSYCODE-RT: a Real-Time Extension for an ESL HW/SW Co-Design Methodology.
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018

Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements.
Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems.
Proceedings of the 7th Mediterranean Conference on Embedded Computing, 2018

Criticality-driven Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems.
Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

Design Space Exploration for Mixed-Criticality Embedded Systems Considering Hypervisor-Based SW Partitions.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017
Time Bands: A Software Approach for Timing Analysis on Resource Constrained Systems.
Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017

An Efficient Performance-Driven Approach for HW/SW Co-Design.
Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering, 2017

Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip.
Proceedings of the 2017 European Modelling Symposium (EMS), 2017

2016
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system.
EURASIP J. Embed. Syst., 2016

Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints.
Proceedings of the 2nd IEEE International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2016

A Flexible Profiling Sub-System for Reconfigurable Logic Architectures.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

2015
Hardware performance sniffers for embedded systems profiling.
Proceedings of the 12th International Workshop on Intelligent Solutions in Embedded Systems, 2015

2014
A Proposal to Expand the Community of Users Able to Process Historical Rainfall Data by Means of the Today Available Open Source Libraries.
J. Comput. Inf. Technol., 2014


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