Marco Faccio

According to our database1, Marco Faccio authored at least 22 papers between 1998 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Portable Lock-In Amplifier-Based Optoelectronic Readout Circuit for High-Sensitivity Differential Measurements of Laser Pulse Energy Variations.
J. Low Power Electronics, 2019

Live Demonstration: Event-Driven Serial Communication on Optical Fiber.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Performance of Satellite Digital Transparent Processors Through Equivalent Noise.
IEEE Trans. Aerospace and Electronic Systems, 2018

Design of Digital Satellite Processors: From Communications Link Performance to Hardware Complexity.
IEEE Journal on Selected Areas in Communications, 2018

Photodiode Bridge-Based Differential Readout Circuit for High-Sensitivity Measurements of Energy Variations of Laser Pulses for Optoelectronic Sensing Systems.
Proceedings of the 2018 New Generation of CAS, 2018

An FPGA-Based Architecture of True Random Number Generator for Network Security Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 0.35μm CMOS 200kHz-2GHz Fully-Analogue Closed-Loop Circuit for Continuous-Time Clock Duty-Cycle Correction in Integrated Digital Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An Ultra-Wideband-Inspired System-on-Chip for an Optical Bidirectional Transcutaneous Biotelemetry.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2017
Computing the hardware complexity of digital transparent satellite processors on the basis of performance requirements.
Proceedings of the IEEE International Conference on Communications, 2017

A 250Mbps 24pJ/bit UWB-inspired optical communication system for bioimplants.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system.
EURASIP J. Emb. Sys., 2016

Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints.
Proceedings of the IEEE 2nd International Forum on Research and Technologies for Society and Industry Leveraging a better tomorrow, 2016

A Flexible Profiling Sub-System for Reconfigurable Logic Architectures.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

An Analytical Method for Performance Evaluation of Digital Transparent Satellite Processors.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

2015
Hardware performance sniffers for embedded systems profiling.
Proceedings of the 12th International Workshop on Intelligent Solutions in Embedded Systems, 2015

2013
A Methodology for Design of Scalable Architectures in Software Radio Networks: a Unified Device and Network Perspective.
Signal Processing Systems, 2013

2012
An Integrated Approach to the Design of Wireless Sensor Networks for Structural Health Monitoring.
IJDSN, 2012

A methodology to design an advanced framework for efficient modelling and testing of manets.
Proceedings of the 2012 Wireless Telecommunications Symposium, 2012

2003
High-accuracy instrumentation amplifier for low voltage low power CMOS smart sensors.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of accurate analog circuits for low voltage low power CMOS systems.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2000
New ADC with piecewise linear characteristic: case study-implementation of a smart humidity sensor.
IEEE Trans. Instrumentation and Measurement, 2000

1998
Measurement system for a preliminary characterization of flash memory cells for multilevel applications.
IEEE Trans. Instrumentation and Measurement, 1998


  Loading...