Fabio Salice

Giovanna Viana Mundstock Freitas

Proceedings of the 15th International Conference on Ubiquitous Computing & Ambient Intelligence (UCAmI 2023), 2023

Sleep Monitoring: Enriching the Traditional Approach by Sensor-collected Data.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE International Conference on Healthcare Informatics, 2023

CardiaPPG - A Portable, Low-Cost Photopletismograph for the Evaluation of the Cardiovascular Age.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Digital Health, 2023

Preventing Muscle Imbalance: A Cost-Effective Solution for Home Exercise.

[BibT_eX]

[DOI]

Proceedings of the 2023 ACM Conference on Information Technology for Social Good, 2023

2022

A Multi-Resident Number Estimation Method for Smart Homes.

[BibT_eX]

[DOI]

Sensors, 2022

BUZZBAND: A Vibrating Wristband for Hearing-Impaired Elderly People.

[BibT_eX]

[DOI]

Proceedings of the Computers Helping People with Special Needs, 2022

A Review on Technological Solutions Supporting People with Dementia in the Activity of Dressing.

[BibT_eX]

[DOI]

Proceedings of the Computers Helping People with Special Needs, 2022

2021

Understanding Social Behaviour in a Health-Care Facility from Localization Data: A Case Study.

[BibT_eX]

[DOI]

Sensors, 2021

High-Efficiency Multi-Sensor System for Chair Usage Detection.

[BibT_eX]

[DOI]

Sensors, 2021

CESS: Closed Environment Safety System.

[BibT_eX]

[DOI]

Proceedings of the GoodIT '21: Conference on Information Technology for Social Good, 2021

2020

Monitoring Cooker Activities Using a Grid-EYE Infrared Array Sensor.

[BibT_eX]

[DOI]

Proceedings of the GoodTechs '20: 6th EAI International Conference on Smart Objects and Technologies for Social Good, 2020

2019

Wellness Assessment of Alzheimer's Patients in an Instrumented Health-Care Facility.

[BibT_eX]

[DOI]

Andrea Masciadri

Sensors, 2019

SMARE: Semi-supervised Method for Activities of daily living REcognition.

[BibT_eX]

[DOI]

Andrea Masciadri

Proceedings of the 2019 IEEE International Conference on Systems, Man and Cybernetics, 2019

Wellness Indexes to Assess Quality of Life: a technological support.

[BibT_eX]

[DOI]

Proceedings of the 5th EAI International Conference on Smart Objects and Technologies for Social Good, 2019

Understanding Home Inactivity for Human Behavior Anomaly Detection.

[BibT_eX]

[DOI]

Proceedings of the 5th EAI International Conference on Smart Objects and Technologies for Social Good, 2019

2018

CC4CS: an Off-the-Shelf Unifying Statement-Level Performance Metric for HW/SW Technologies.

[BibT_eX]

[DOI]

Proceedings of the Companion of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018

Supporting Alzheimer's Residential Care - A Novel Indoor Localization System.

[BibT_eX]

[DOI]

Proceedings of the 15th International Joint Conference on e-Business and Telecommunications, 2018

Non-invasive monitoring system to detect sitting people.

[BibT_eX]

[DOI]

Proceedings of the 4th EAI International Conference on Smart Objects and Technologies for Social Good, 2018

Disseminating Synthetic Smart Home Data for Advanced Applications.

[BibT_eX]

[DOI]

Proceedings of the CIKM 2018 Workshops co-located with 27th ACM International Conference on Information and Knowledge Management (CIKM 2018), 2018

2017

ALMA: An Indoor Localization and Navigation System for the Elderly.

[BibT_eX]

[DOI]

Proceedings of the Smart Objects and Technologies for Social Good, 2017

Quantitative Indicators for Behaviour Drift Detection from Home Automation Data.

[BibT_eX]

[DOI]

Proceedings of the Harnessing the Power of Technology to Improve Lives, 2017

Human Behavior Drift Detection in a Smart Home Environment.

[BibT_eX]

[DOI]

Proceedings of the Harnessing the Power of Technology to Improve Lives, 2017

2016

Indoor Activity Monitoring for Mutual Reassurance.

[BibT_eX]

[DOI]

Proceedings of the Smart Objects and Technologies for Social Good, 2016

PIR Probability Model for a Cost/Reliability Tradeoff Unobtrusive Indoor Monitoring System.

[BibT_eX]

[DOI]

Proceedings of the Smart Objects and Technologies for Social Good, 2016

Maps for Easy Paths (MEP): Enriching Maps with Accessible Paths Using MEP Traces.

[BibT_eX]

[DOI]

Proceedings of the Smart Objects and Technologies for Social Good, 2016

2015

Method, Design and Implementation of an Indoor Tracking System with Concurrent Fault Localization.

[BibT_eX]

[DOI]

Fabio Veronese

EAI Endorsed Trans. Ubiquitous Environ., 2015

An Expert CAD Flow for Incremental Functional Diagnosis of Complex Electronic Boards.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Bridge: Mutual Reassurance for Autonomous and Independent Living.

[BibT_eX]

[DOI]

IEEE Intell. Syst., 2015

SHARON: a Simulator of Human Activities, ROutines and Needs.

[BibT_eX]

[DOI]

Proceedings of the Assistive Technology, 2015

BRIDGeViz: Towards an Interactive Data Visualization Tool for Exploration of Indoor Daily Life of an Older Adult.

[BibT_eX]

[DOI]

Proceedings of the Assistive Technology, 2015

ODINS: On-Demand Indoor Navigation System RFID Based.

[BibT_eX]

[DOI]

Federico Bianchi

Andrea Masciadri

Proceedings of the Assistive Technology, 2015

2014

Towards a Hand-Based Gestural Language for Smart-Home Control Using Hand Shapes and Dynamic Hand Movements.

[BibT_eX]

[DOI]

Proceedings of the Ubiquitous Computing and Ambient Intelligence. Personalisation and User Adapted Services, 2014

Method, design and implementation of a multiuser indoor localization system with concurrent fault detection.

[BibT_eX]

[DOI]

Proceedings of the 11th International Conference on Mobile and Ubiquitous Systems: Computing, 2014

Method, Design and Implementation of a Self-checking Indoor Localization System.

[BibT_eX]

[DOI]

Fabio Veronese

Daniel Soleimani Pour

Matteo Matteucci

Proceedings of the Ambient Assisted Living and Daily Activities, 2014

Personalized Hand Pose and Gesture Recognition System for the Elderly.

[BibT_eX]

[DOI]

Proceedings of the Universal Access in Human-Computer Interaction. Aging and Assistive Environments, 2014

Static hand poses for gestural interaction: a study.

[BibT_eX]

[DOI]

Proceedings of the International Working Conference on Advanced Visual Interfaces, 2014

2013

A data mining approach to incremental adaptive functional diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

2011

Optimal Test Set Selection for Fault Diagnosis Improvement.

[BibT_eX]

[DOI]

Luca Amati

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

2010

Improving fault diagnosis accuracy by automatic test set modification.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

A Formal Condition to Stop an Incremental Automatic Functional Diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Test Selection Policies for Faster Incremental Fault Detection.

[BibT_eX]

[DOI]

Luca Amati

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009

An Incremental Approach to Functional Diagnosis.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008

Software and Hardware Techniques for SEU Detection in IP Processors.

[BibT_eX]

[DOI]

J. Electron. Test., 2008

Convolutional Coding for SEU mitigation.

[BibT_eX]

[DOI]

Matteo Alan Radaelli

Proceedings of the 13th European Test Symposium, 2008

A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation.

[BibT_eX]

[DOI]

Matteo Alan Radaelli

Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

A performance-oriented hardware/software partitioning for datapath applications.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

2007

Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs.

[BibT_eX]

Marco D. Santambrogio

Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007

A New Framework for Design and Simulation of Complex Hardware/Software Systems.

[BibT_eX]

[DOI]

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

RAM-Based Fault Tolerant State Machines for FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006

Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

Evolving classifiers on field programmable gate arrays: Migrating XCS to FPGAs.

[BibT_eX]

[DOI]

J. Syst. Archit., 2006

2005

A model of soft error effects in generic IP processors.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

Reliable System Specification for Self-Checking Data-Paths.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

Toward an FPGA implementation of XCS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Congress on Evolutionary Computation, 2005

2004

Discrete-Event Modeling and Simulation of Superscalar Microprocessor Architectures.

[BibT_eX]

[DOI]

Carlo Brandolese

Proceedings of the Integrated Circuit and System Design, 2004

Reliable System Co-Design: The FIR Case Study.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

Analysis and Modeling of Energy Reducing Source Code Transformations.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

An area estimation methodology for FPGA based designs at systemc-level.

[BibT_eX]

[DOI]

Carlo Brandolese

Proceedings of the 41th Design Automation Conference, 2004

Source-Level Models for Software Power Optimization.

[BibT_eX]

[DOI]

Carlo Brandolese

Proceedings of the Ultra Low-Power Electronics and Design, 2004

2003

Logical and physical design issues for smart card databases.

[BibT_eX]

[DOI]

Fabio Alberto Schreiber

Letizia Tanca

ACM Trans. Inf. Syst., 2003

The design of reliable devices for mission-critical applications.

[BibT_eX]

[DOI]

IEEE Trans. Instrum. Meas., 2003

Partitioning of Embedded Applications onto Heterogeneous Multiprocessor Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2003 ACM Symposium on Applied Computing (SAC), 2003

An Internal Representation Model for System-Level Co-Design of Heterogeneous Multiprocessor Embedded System.

[BibT_eX]

Proceedings of the Forum on specification and Design Languages, 2003

An Integrated Design Approach for Self-Checking FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

A First Step Towards Hw/Sw Partitioning of UML Specifications.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Library Functions Timing Characterization for Source-Level Analysis.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Early estimation of the size of VHDL projects.

[BibT_eX]

[DOI]

Daniele Paolo Scarpazza

Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003

2002

Static power modeling of 32-bit microprocessors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

The Impact of Source Code Transformations on Software Power and Energy Consumption.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2002

Reliability Properties Assessment at System Level: A Co-Design Framework.

[BibT_eX]

[DOI]

J. Electron. Test., 2002

Physical and Logical Data Structures for Very Small Databases.

[BibT_eX]

Fabio Alberto Schreiber

Letizia Tanca

Proceedings of the Decimo Convegno Nazionale su Sistemi Evoluti per Basi di Dati, 2002

Modeling Assembly Instruction Timing in Superscalar Architectures.

[BibT_eX]

[DOI]

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

Fault-Tolerant CAM Architectures: A Design Framework.

[BibT_eX]

[DOI]

Mariagiovanna Sami

Renato Stefanelli

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

Designing Self-Checking FPGAs through Error Detection Codes.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

Metrics for design space exploration of heterogeneous multiprocessor embedded systems.

[BibT_eX]

[DOI]

Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2001

On-line fault detection in a hardware/software co-design environment.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Dynamic modeling of inter-instruction effects for execution time estimation.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Designing Reliable Embedded Systems Based on 32 Bit Microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

An Assembly-Level Execution-Time Model for Pipelined Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A Software Methodology for Detecting Hardware Faults in VLIW Data Paths.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

Development cost and size estimation starting from high-level specifications.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

Source-level execution time estimation of C programs.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001

2000

Design of VHDL-based totally self-checking finite-state machine and data-path descriptions.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2000

A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2000

A Multi-Level Strategy for Software Power Estimation.

[BibT_eX]

[DOI]

Proceedings of the 13th International Symposium on System Synthesis, 2000

An instruction-level functionally-based energy estimation model for 32-bits microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 37th Conference on Design Automation, 2000

Energy estimation for 32-bit microprocessors.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

1999

A Synthesis Methodology Aimed at Improving the Quality of TSC Devices.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1998

Fault Analysis for Networks with Concurrent Error Detection.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 1998

Concurrent Error Detection at Architectural Level.

[BibT_eX]

[DOI]

Proceedings of the 11th International Symposium on System Synthesis, 1998

System-level performance estimation strategy for sw and hw.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Fault Analysis in Networks with Concurrent Error Detection Properties.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

A Model for System-Level Timed Analysis and Profiling.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

1997

A TSC Evaluation Function for Combinational Circuits.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

Parity Bit Code: Achieving a Complete Fault Coverage in the Design of TSC Combinational Networks.

[BibT_eX]

[DOI]

Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

Designing Networks with Error Detection Properties through the Fault-Error Relation.

[BibT_eX]

[DOI]

Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997

A novel methodology for designing TSC networks based on the parity bit code.

[BibT_eX]

[DOI]

Proceedings of the European Design and Test Conference, 1997

A Flexible Model for Evaluating the Behavior of Hardware/Software Systems.

[BibT_eX]

[DOI]

Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

1996

Redundant Faults in TSC Networks: Definition and Removal.

[BibT_eX]

[DOI]

Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

1995

A new architecture for the automatic design of custom digital neural network.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1995

Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic.

[BibT_eX]

[DOI]

Giacomo Buonanno

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A BDD Based Algorithm for Detecting Difficult Faults.

[BibT_eX]

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Behavior-driven minimal implementation of digital ANNs.

[BibT_eX]

[DOI]

A. Basaglia

Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

Self-checking FSMs based on a constant distance state encoding.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995

1994

Synthesis of Multi-level Self-Checking Logic.

[BibT_eX]

Mariagiovanna Sami