Eugenio Villar

According to our database1, Eugenio Villar authored at least 77 papers between 1995 and 2017.

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Bibliography

2017
Modeling Hardware/Software Embedded Systems with UML/MARTE: A Single-Source Design Approach.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Special issue on: "Heterogeneous architectures for Cyber-physical systems (HACPS)".
Microprocessors and Microsystems - Embedded Hardware Design, 2017

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocessors and Microsystems - Embedded Hardware Design, 2017

Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation Accuracy.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
Using Professional Resources for Teaching Embedded SW Development.
IEEE-RITA, 2016

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
Innovative circuit and system design methodologies for green cyber-physical systems.
Microprocessors and Microsystems - Embedded Hardware Design, 2015

Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics.
Journal of Systems Architecture - Embedded Systems Design, 2015

A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

Enhancing analysability and time predictability in UML/MARTE component-based application models.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015

2014
Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation.
Microelectronics Journal, 2014

Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project.
Microprocessors and Microsystems - Embedded Hardware Design, 2014

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems.
Journal of Systems Architecture - Embedded Systems Design, 2014

A framework for design space exploration and performance analysis of networked embedded systems.
Proceedings of the 2014 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2014

Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration.
Microprocessors and Microsystems - Embedded Hardware Design, 2013

EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Early Performance Evaluation of Multi-OS Embedded Platforms Using Native Simulation.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Towards automated implementation of adaptive systems from abstract SystemC specifications - From SystemC adaptive processes to embedded software and to synthesizable hardware descriptions.
Design Autom. for Emb. Sys., 2012

Automatic synthesis from UML/MARTE models using channel semantics.
Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, 2012

Model-Driven Methodology for the Development of Multi-level Executable Environments.
Proceedings of the Models, Methods, and Tools for Complex Chip Design, 2012

A model-driven methodology for the development of SystemC executable environments.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

COMPLEX: COdesign and Power Management in PLatform-Based Design Space EXploration.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
A Multi-Processing Systems-on-Chip Native Simulation Framework for Power and Thermal-Aware Design.
J. Low Power Electronics, 2011

Early, time-approximate modeling of multi-OS. linux platforms in a systemC co-simulation environment.
Comput. Syst. Sci. Eng., 2011

Systemc refinement of abstract adaptive processes for implementation into Dynamically Reconfigurable Hardware.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

A framework for the generation from UML/MARTE models of IPXACT HW platform descriptions for multi-level performance estimation.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

Fast data-cache modeling for native co-simulation.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011


M3-SCoPE: Performance Modeling of Multi-Processor Embedded Systems for Fast Design Space Exploration.
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011

High-level modeling and exploration of a powerline communication network based on System-on-Chip.
Proceedings of the Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, 2011

2010
Generating heterogeneous executable specifications in SystemC from UML/MARTE models.
ISSE, 2010

L2 Cache Modeling based on address modification for Native Co-Simulation in SystemC.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010


The SATURN Approach to SysML-Based HW/SW Codesign.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

The SATURN Approach to SysML-Based HW/SW Codesign.
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Early Modeling of Linux-Based RTOS Platforms in a SystemC Time-Approximate Co-simulation Environment.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2010

AADS+: AADL Simulation Including the Behavioral Annex.
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems, 2010

Formal Modeling for UML/MARTE Concurrency Resources.
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems, 2010

Fast instruction cache modeling for approximate timed HW/SW co-simulation.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Formal Support for Untimed SystemC Specifications: Application to High-level Synthesis.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

Formal Foundations for MARTE-SystemC Interoperability.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

Modeling Separate Memory Spaces in Native Co-simulation with SystemC for Design Space Exploration.
Proceedings of the ARCS '10, 2010

2009
Automatic HW/SW Interface Modeling for Scratch-Pad and Memory Mapped HW Components in Native Source-Code Co-simulation.
Proceedings of the Analysis, 2009

AADL Simulation and Performance Analysis in SystemC.
Proceedings of the 14th IEEE International Conference on Engineering of Complex Computer Systems, 2009

Local application of simulation directed for Exhaustive Coverage of Schedulings of SystemC specifications.
Proceedings of the Forum on specification and Design Languages, 2009

2008
C-Based Design of Heterogeneous Embedded Systems.
EURASIP J. Emb. Sys., 2008

Bridging MoCs in SystemC Specifications of Heterogeneous Systems.
EURASIP J. Emb. Sys., 2008

Specification of Adaptive HW/SW Systems in SystemC.
Proceedings of the Forum on specification and Design Languages, 2008

Heterogeneous System-level Specification Using SystemC.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
A framework for heterogeneous specification and design of electronic embedded systems in SystemC.
ACM Trans. Design Autom. Electr. Syst., 2007

Specification for SystemC-AADL interoperability.
Proceedings of the Fifth Workshop on Intelligent Solutions in Embedded Systems, 2007

The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
Proceedings of the FPL 2007, 2007

Protocol Bus Modeling using inheritance with TLM2.0.
Proceedings of the Forum on specification and Design Languages, 2007

A general approach to the interoperability of HetSC and SystemC-AMS.
Proceedings of the Forum on specification and Design Languages, 2007

2006
Extension of the SystemC Kernel for Simulation Coverage.
Proceedings of the Forum on specification and Design Languages, 2006

A framework for embedded system specification under different models of computation in SystemC.
Proceedings of the 43rd Design Automation Conference, 2006

POSIX modeling in SystemC.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model.
Design Autom. for Emb. Sys., 2005

Mixing Synchronous Reactive and Untimed Models of Computation.
Proceedings of the Forum on specification and Design Languages, 2005

2004
Single Source Design Environment for Embedded Systems Based on SystemC.
Design Autom. for Emb. Sys., 2004

Heterogeneous System-Level Specification in SystemC.
Proceedings of the Forum on specification and Design Languages, 2004

System-Level Performance Analysis in SystemC.
Proceedings of the 2004 Design, 2004

2003
Modeling of CSP, KPN and SR Systems with SystemC.
Proceedings of the Forum on specification and Design Languages, 2003

Systemic Embedded Software Generation from SystemC.
Proceedings of the 2003 Design, 2003

Systematic Embedded Software Generation from Systemc.
Proceedings of the Embedded Software for SoC, 2003

2001
C/C++: progress or deadlock in system-level specification.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000
System Specification Experiments on a Common Benchmark.
IEEE Design & Test of Computers, 2000

1999
Hardware/Software Embedded System Specifiaction and Design Using Ada and VHDL.
Proceedings of the Reliable Software Technologies, 1999

1998
An algorithm for clock cycle selection in behavioral synthesis.
Journal of Systems Architecture, 1998

1996
VHDL synthesis description portability: The need for Level synthesis subsets.
Journal of Systems Architecture, 1996

ASPDAC 1995: HDL synthesizability and interoperability.
IEEE Design & Test of Computers, 1996

1995
Future direction of synthesizabilty and interoperability of HDL's: part 2.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995

Future direction of synthesizability and interoperability of HDL's: part 1.
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29, 1995


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