Chang Wu

Orcid: 0009-0007-8838-9039

According to our database1, Chang Wu authored at least 65 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Blockchain-Based Interpretable Electric Vehicle Battery Life Prediction in IoV.
IEEE Internet Things J., February, 2024

VoxelMap++: Mergeable Voxel Mapping Method for Online LiDAR(-Inertial) Odometry.
IEEE Robotics Autom. Lett., January, 2024

A Parking Detection Algorithm Based on Multitransitory Finite-State Machine Using Magnetic Wireless Sensor Network.
IEEE Internet Things J., 2024

MolTC: Towards Molecular Relational Modeling In Language Models.
CoRR, 2024

NetAssistant: Dialogue Based Network Diagnosis in Data Center Networks.
Proceedings of the 21st USENIX Symposium on Networked Systems Design and Implementation, 2024

2023
MPCNet: Compressed multi-view video restoration via motion-parallax complementation network.
Neural Networks, October, 2023

Global priors guided modulation network for joint super-resolution and SDRTV-to-HDRTV.
Neurocomputing, October, 2023

Dual-Band Power Divider With Wide Passbands and Wide Harmonic Suppression Utilizing Multi-Mode T-Stub Loaded Slotline Resonators.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2023

A Deep Learning Parking Detection Algorithm Using W-Shape Magnetic Wireless Sensor Networks.
IEEE Trans. Instrum. Meas., 2023

Hybrid Indoor Positioning Method of BLE and PDR Based on Adaptive Feedback EKF With Low BLE Deployment Density.
IEEE Trans. Instrum. Meas., 2023

Hybrid Indoor Positioning Method of BLE and Monocular VINS-Based Smartphone.
IEEE Trans. Instrum. Meas., 2023

Cross-Layer Optimization for Statistical QoS Provision in C-RAN with Finite-Length Coding.
CoRR, 2023

VoxelMap++: Mergeable Voxel Mapping Method for Online LiDAR(-inertial) Odometry.
CoRR, 2023

Streaming 360-degree VR Video with Statistical QoS Provisioning in mmWave Networks from Delay and Rate Perspectives.
CoRR, 2023

AQM-based Buffer Delay Guarantee for Congestion Control in 5G Networks.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2023

A Model-driven Early Warning Approach for Transmission Lines Failure under Wind Storms.
Proceedings of the IEEE Sustainable Power and Energy Conference, 2023

Millimeter-Wave AlGaN/GaN MIS-HEMTs with Multiple T-Gate Technology.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

FPGA Technology Mapping with Adaptive Gate Decomposition.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

HierSyn: Fast Synthesis for Large Hierarchical Designs.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

An Efficient Scheduling Algorithm for Stream Computing.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A General-Purpose Compiler Design for Instruction-Based AI Accelerator Implementation.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
Towards coding for VoD application: An enhanced video compression system with a content-fitted recursive restoration network.
Digit. Signal Process., 2022

Global Priors Guided Modulation Network for Joint Super-Resolution and Inverse Tone-Mapping.
CoRR, 2022

An information propagation network dynamic considering multi-platform influences.
Appl. Math. Lett., 2022

SDRTV-to-HDRTV via Hierarchical Dynamic Context Feature Mapping.
Proceedings of the MM '22: The 30th ACM International Conference on Multimedia, Lisboa, Portugal, October 10, 2022

Collar Data Synthesis and Its Application for Generating Virtual Collar 3D Novel View from a Single-View.
Proceedings of the IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2022

Real-Time Image Inpainting using PatchMatch Based Two-Generator Adversarial Networks with Optimized Edge Loss Function.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Characterization of Single Event Upsets of Nanoscale FDSOI Circuits Based on the Simulation and Irradiation Results.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Modeling and Analyzing the Multi-Information Network Propagation Dynamics on Hot Events.
Proceedings of the 2022 11th International Conference on Computing and Pattern Recognition, 2022

Hybrid video coding scheme based on VVC and spatio-temporal attention convolution neural network.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022

2021
Dependency Graph-based High-level Synthesis for Maximum Instruction Parallelism.
ACM Trans. Reconfigurable Technol. Syst., 2021

Hybrid Indoor Positioning System for Pedestrians With Swinging Arms Based on Smartphone IMU and RSSI of BLE.
IEEE Trans. Instrum. Meas., 2021

RSNN: A Software/Hardware Co-Optimized Framework for Sparse Convolutional Neural Networks on FPGAs.
IEEE Access, 2021

An Efficient Video Coding System With an Adaptive Overfitted Multi-Scale Attention Network.
IEEE Access, 2021

FM-VSR: Feature Multiplexing Video Super-Resolution for Compressed Video.
IEEE Access, 2021

Highly Efficient Modulo Loop Pipeline For High Level Synthesis.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
The Max-Re-LOGMPA for SCMA Demodulation.
Wirel. Pers. Commun., 2020

Qualitative analysis of intellectual property forgery in manufacturing enterprises in Industry 4.0 environment.
Int. J. Technol. Manag., 2020

Indoor Positioning System With Cellular Network Assistance Based on Received Signal Strength Indication of Beacon.
IEEE Access, 2020

A Video Compression Framework Using an Overfitted Restoration Neural Network.
Proceedings of the 2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2020

2019
Design and verification of universal evaluation system for single event effect sensitivity measurement in very-large-scale integrated circuits.
IEICE Electron. Express, 2019

A Reconfigurable Accelerator for Sparse Convolutional Neural Networks.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Highly Efficient Sparse Neural Network Computing: Hardware and Software Solutions.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

An Efficient Accelerator for Sparse Convolutional Neural Networks.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

Latency Minimal Scheduling with Maximum Instruction Parallelism.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
Resource and data optimization for hardware implementation of deep neural networks targeting FPGA-based edge devices.
Proceedings of the 20th System Level Interconnect Prediction Workshop, 2018

2017
Layout driven FPGA packing algorithm for performance optimization.
IEICE Electron. Express, 2017

Heterogeneous computing for CNN.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
In-place LUT polarity inVersion to mitigate soft errors for FPGAs.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

2015
Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
A List Simulated Annealing Algorithm for Task Scheduling on Network-on-Chip.
J. Comput., 2014

Providing Useful Information for Passengers Based on TTF Model.
Proceedings of the 2014 IEEE International Conference on Internet of Things, 2014

2013
The implementation of an improve infrared dim-small target track before detect based on DSP.
Proceedings of the International Conference on Machine Learning and Cybernetics, 2013

2011
An analytical model for Network-on-Chip with finite input buffer.
Frontiers Comput. Sci. China, 2011

2009
Shortest path based simulated annealing algorithm for dynamic facility layout problem under dynamic business environment.
Expert Syst. Appl., 2009

2008
Lottery Router: A Customized Arbitral Priority NOC Router.
Proceedings of the International Conference on Computer Science and Software Engineering, 2008

A NoC Simulation and Verification Platform Based on SystemC.
Proceedings of the International Conference on Computer Science and Software Engineering, 2008

2002
Global clustering-based performance-driven circuit partitioning.
Proceedings of 2002 International Symposium on Physical Design, 2002

2000
Performance driven multi-level and multiway partitioning with retiming.
Proceedings of the 37th Conference on Design Automation, 2000

1999
Optimal FPGA mapping and retiming with efficient initial state computation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Cut Ranking and Pruning: Enabling a General and Efficient FPGA Mapping Solution.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

Simultaneous Circuit Partitioning/Clustering with Retiming for Performance Optimization.
Proceedings of the 36th Conference on Design Automation, 1999

1998
An efficient algorithm for performance-optimal FPGA technology mapping with retiming.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997
FPGA Synthesis with Retiming and Pipelining for Clock Period Minimization of Sequential Circuits.
Proceedings of the 34st Conference on Design Automation, 1997

1996
An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996


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