Wendong Mao

Orcid: 0000-0001-7345-7974

According to our database1, Wendong Mao authored at least 27 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
Hardware Accelerator Design for Sparse DNN Inference and Training: A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

NASA-F: FPGA-Oriented Search and Acceleration for Multiplication-Reduced Hybrid Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2023
A Low-Latency Framework With Algorithm-Hardware Co-Optimization for 3-D Point Cloud.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

A Unified Acceleration Solution Based on Deformable Network for Image Pixel Processing.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

FTA-GAN: A Computation-Efficient Accelerator for GANs With Fast Transformation Algorithm.
IEEE Trans. Neural Networks Learn. Syst., June, 2023

Intelligent Typography: Artistic Text Style Transfer for Complex Texture and Structure.
IEEE Trans. Multim., 2023

An Efficient Accelerator Based on Lightweight Deformable 3D-CNN for Video Super-Resolution.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

A Computationally Efficient Neural Video Compression Accelerator Based on a Sparse CNN-Transformer Hybrid Network.
CoRR, 2023

S2R: Exploring a Double-Win Transformer-Based Framework for Ideal and Blind Super-Resolution.
CoRR, 2023

2022
A robust framework for multi-view stereopsis.
Vis. Comput., 2022

An Efficient FPGA Accelerator for Point Cloud.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

An Efficient Accelerator of Deformable 3D Convolutional Network for Video Super-Resolution.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

An Efficient FPGA-based Accelerator for Deep Forest.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Reconfigurable Approach for Deconvolutional Network Acceleration with Fast Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Accelerate Three-Dimensional Generative Adversarial Networks Using Fast Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A Memory-Efficient Hardware Architecture for Deformable Convolutional Networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

A Reconfigurable Accelerator for Generative Adversarial Network Training Based on FPGA.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

LITNet: A Light-weight Image Transform Net for Image Style Transfer.
Proceedings of the International Joint Conference on Neural Networks, 2021

2020
F-DNA: Fast Convolution Architecture for Deconvolutional Network Acceleration.
IEEE Trans. Very Large Scale Integr. Syst., 2020

BSD-GAN: Branched Generative Adversarial Network for Scale-Disentangled Representation Learning and Image Synthesis.
IEEE Trans. Image Process., 2020

No-reference image sharpness assessment based on discrepancy measures of structural degradation.
J. Vis. Commun. Image Represent., 2020

A Computation-Efficient Solution for Acceleration of Generative Adversarial Network.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

2019
Multi-Scale Convolution Aggregation and Stochastic Feature Reuse for DenseNets.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2019

Semi-Dense Stereo Matching Using Dual CNNs.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2019

Methodology for Efficient Reconfigurable Architecture of Generative Neural Network.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Global-Matching Framework for Multi-View Stereopsis.
Proceedings of the Computer Analysis of Images and Patterns, 2019

2018
Disparity Filtering with 3D Convolutional Neural Networks.
Proceedings of the 15th Conference on Computer and Robot Vision, 2018


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