Xiao Pu

Affiliations:
  • Texas Instruments, Dallas, TX, USA
  • University of Texas at Austin, TX, USA (Ph.D.)


According to our database1, Xiao Pu authored at least 5 papers between 2008 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2015
An Embedded 65 nm CMOS Remote Temperature Sensor With Digital Beta Correction and Series Resistance Cancellation Achieving an Inaccuracy of 0.4<sup>°</sup>C (3σ) From - 40<sup>°</sup>C to 130<sup>°</sup>C.
IEEE J. Solid State Circuits, 2015

2014
Corrections to "Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference".
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2012
Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A Novel fractional-n PLL Based on a Simple Reference Multiplier.
J. Circuits Syst. Comput., 2012

2008
Improving Bandwidth while Managing Phase Noise and Spurs in Fractional-N PLL.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008


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