Xiaonan Tang

According to our database, Xiaonan Tang authored at least 9 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism.

Zhou Wang, Haochen Du, Jiuren Zhou, Zhou Shu, Yanqing Xu, Vivek Mohan, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Emmanuel M. Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

STPE: An Energy-Efficient Edge-Device Transformer Inference Processor with Multi-Mode Data-Compression Scheme.

Zhou Wang, Haochen Du, Vivek Mohan, Jiuren Zhou, Zhou Shu, Yanqing Xu, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Emmanuel M. Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

UPE: A Device-Edge DNN Inference Artificial Intelligence Processor with Supporting Reconfigurable Training.

Zhou Wang, Haochen Du, Yanqing Xu, Zhou Shu, Jiuren Zhou, Liyuan Guo, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Manos Mic Drakakis

Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

RSPE: A High Energy Efficient SNN Inference Processor with RISC-V based Dynamic Pruning Mechanism.

Zhou Wang, Haochen Du, Zhou Shu, Vivek Mohan, Liyuan Guo, Wei Mao, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Manos Mic Drakakis

Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

2024

GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications.

Zhou Wang, Haochen Du, Jiuren Zhou, Yang Zhou, Xiaonan Tang, Tianchun Ye, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing.

Zhou Wang, Haochen Du, Jiuren Zhou, Yanqing Xu, Xiaonan Tang, Tianchun Ye, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

RCPE: An Excellent Performance Training Processor with RISC-V based Compression Mechanism.

Zhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism.

Zhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023

TPE: A High-Performance Edge-Device Inference with Multi-level Transformational Mechanism.

Zhou Wang, Jingchuan Wei, Xiaonan Tang, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023