Xiaonan Tang

According to our database1, Xiaonan Tang authored at least 7 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2025
GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

STPE: An Energy-Efficient Edge-Device Transformer Inference Processor with Multi-Mode Data-Compression Scheme.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

RCPE: An Excellent Performance Training Processor with RISC-V based Compression Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
TPE: A High-Performance Edge-Device Inference with Multi-level Transformational Mechanism.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023


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