Zhou Wang

According to our database, Zhou Wang authored at least 23 papers between 2018 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

DSPE: An Energy-Efficient Edge Processor for DeepSeek Inference with MerkleTree-based Incremental Pruning, Multi-Stage Boothing Lookup and Dynamic Adaptive Posit Processing.

Yuhan Zhang, Zhou Wang, Zhou Shu, Jiuren Zhou, Yanqing Xu, Xiaonan Tang, Shushan Qiao, Tian-Chun Ye, Yang Liu, Anil A. Bharath, Emm Mic Drakakis

CoRR, May, 2026

GATPE: A High-Performance Edge-Device GAT Processor with Multi-Layer Data-Variation Mechanism.

Zhou Wang, Bin Wang, Haochen Du, Zhou Shu, Jiuren Zhou, Xiguang Wu, Qiankun Li, Yanqing Xu, Hanqi Feng, Xiaonan Tang, Shushan Qiao, Anil A. Bharath, Emm Mic Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

GTPE: A 28nm 33.12 TFLOPS/W GNN Training Processor with Unstructured Multi Threshold Pruning, Hybrid Multi-mode Approximate Computing and QUIRE Number System Support.

Zhou Wang, Haochen Du, Zhou Shu, Jiuren Zhou, Xiguang Wu, Qiankun Li, Yanqing Xu, Hanqi Feng, Xiaonan Tang, Shushan Qiao, Tian-Chun Ye, Anil A. Bharath, Emm Mic Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

MPE: A Power-Efficient Edge-Device Mamba Processor with Multi-Dimensional Calculation-Compression Scheme.

Zhou Wang, Haochen Du, Zhou Shu, Jiuren Zhou, Xiguang Wu, Qiankun Li, Yanqing Xu, Hanqi Feng, Xiaonan Tang, Shushan Qiao, Yongke Wang, Anil A. Bharath, Emm Mic Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

Efficient Extraction and Packing Modules for Posit Multipliers.

Tong Li, Honglan Jiang, Zhou Wang, Qin Wang, Jianfei Jiang, Zhigang Mao

IEEE Trans. Circuits Syst. II Express Briefs, November, 2025

Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent.

Momen K. Tageldeen, Yacine Belgaid, Vivek Mohan, Zhou Wang, Emmanuel M. Drakakis

CoRR, January, 2025

GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism.

Zhou Wang, Haochen Du, Jiuren Zhou, Zhou Shu, Yanqing Xu, Vivek Mohan, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Emmanuel M. Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Architectural Exploration of Hybrid Neural Decoders for Neuromorphic Implantable BMI.

Vivek Mohan, Biyan Zhou, Zhou Wang, Anil A. Bharath, Emmanuel M. Drakakis, Arindam Basu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

STPE: An Energy-Efficient Edge-Device Transformer Inference Processor with Multi-Mode Data-Compression Scheme.

Zhou Wang, Haochen Du, Vivek Mohan, Jiuren Zhou, Zhou Shu, Yanqing Xu, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Emmanuel M. Drakakis

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

UPE: A Device-Edge DNN Inference Artificial Intelligence Processor with Supporting Reconfigurable Training.

Zhou Wang, Haochen Du, Yanqing Xu, Zhou Shu, Jiuren Zhou, Liyuan Guo, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Manos Mic Drakakis

Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

RSPE: A High Energy Efficient SNN Inference Processor with RISC-V based Dynamic Pruning Mechanism.

Zhou Wang, Haochen Du, Zhou Shu, Vivek Mohan, Liyuan Guo, Wei Mao, Baoyi Han, Xiaonan Tang, Shushan Qiao, Shouyi Yin, Anil A. Bharath, Manos Mic Drakakis

Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

2024

Distributed Spatially Non-Stationary Channel Estimation for Extremely-Large Antenna Systems.

Yanqing Xu, Shuai Wang, Ruihong Jiang, Zhou Wang

EAI Endorsed Trans. Ind. Networks Intell. Syst., 2024

A Low-Complexity Constructive Interference Exploitation Scheme in IRS-NOMA Systems.

Yanqing Xu, Donghong Cai, Shuai Wang, Zhou Wang, Weixi Zhou, Zhicheng Dong

Proceedings of the 24th IEEE International Conference on Communication Technology, 2024

GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications.

Zhou Wang, Haochen Du, Jiuren Zhou, Yang Zhou, Xiaonan Tang, Tianchun Ye, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing.

Zhou Wang, Haochen Du, Jiuren Zhou, Yanqing Xu, Xiaonan Tang, Tianchun Ye, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

RCPE: An Excellent Performance Training Processor with RISC-V based Compression Mechanism.

Zhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation Mechanism.

Zhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023

CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism.

Zhou Wang, Jingchuan Wei, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

TPE: A High-Performance Edge-Device Inference with Multi-level Transformational Mechanism.

Zhou Wang, Jingchuan Wei, Xiaonan Tang, Boxiao Han, Hongjun He, Leibo Liu, Shaojun Wei, Shouyi Yin

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2019

Improved Weighted Least Square Phase Estimation for OFDM-Based WLANs.

Xiaoping Zhou, Bin Wu, Kan Zheng, Zhou Wang

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Simplified pilot-aided weighted least square phase estimation method for OFDM-based WLANs.

Xiaoping Zhou, Bin Wu, Kan Zheng, Zhou Wang

IEICE Electron. Express, 2019

An improved implementation of sum-product algorithm for LDPC decoder.

Zhou Wang, Bin Wu, Tianchun Ye

IEICE Electron. Express, 2019

2018

FPGA and ASIC implementation of reliable and effective architecture for a LTE downlink transmitter.

Zhou Wang, Bin Wu, Tianchun Ye

IEICE Electron. Express, 2018