Xiaopeng Zhang

Orcid: 0000-0002-8076-7185

Affiliations:
  • Huawei Technologies, Shenzhen, China
  • Chinese University of Hong Kong, Hong Kong (former)


According to our database1, Xiaopeng Zhang authored at least 10 papers between 2019 and 2023.

Collaborative distances:

Timeline

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Bibliography

2023
Security Closure of IC Layouts Against Hardware Trojans.
Proceedings of the 2023 International Symposium on Physical Design, 2023

2022
CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

RCANet: Root Cause Analysis via Latent Variable Interaction Modeling for Yield Improvement.
Proceedings of the IEEE International Test Conference, 2022

Partition and place finite element model on wafer-scale engine.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Building up End-to-end Mask Optimization Framework with Self-training.
Proceedings of the ISPD '21: International Symposium on Physical Design, 2021

Attentional Transfer is All You Need: Technology-aware Layout Pattern Generation.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Multi-FPGA Co-optimization: Hybrid Routing and Competitive-based Time Division Multiplexing Assignment.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Layout Pattern Generation and Legalization with Generative Learning Models.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

CU.POKer: Placing DNNs on Wafer-Scale Al Accelerator with Optimal Kernel Sizing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
FIT: Fill Insertion Considering Timing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019


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