Xing Li

Orcid: 0000-0003-1669-5954

According to our database1, Xing Li authored at least 32 papers between 2021 and 2025.

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Bibliography

2025
Behavioral Fingerprinting of Large Language Models.
CoRR, September, 2025

Scaling Up, Speeding Up: A Benchmark of Speculative Decoding for Efficient LLM Test-Time Scaling.
CoRR, September, 2025

A Delay-Driven Iterative Technology Mapping Framework.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2025

TrimR: Verifier-based Training-Free Thinking Compression for Efficient Test-Time Scaling.
CoRR, May, 2025

Unlocking Efficient Long-to-Short LLM Reasoning with Model Merging.
CoRR, March, 2025

SVDq: 1.25-bit and 410x Key Cache Compression for LLM Attention.
CoRR, February, 2025

KVTuner: Sensitivity-Aware Layer-wise Mixed Precision KV Cache Quantization for Efficient and Nearly Lossless LLM Inference.
CoRR, February, 2025

AttentionPredictor: Temporal Pattern Matters for Efficient LLM Inference.
CoRR, February, 2025

A Unified Parallel Framework for LUT Mapping and Logic Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025

Circuit Transformer: A Transformer That Preserves Logical Equivalence.
Proceedings of the Thirteenth International Conference on Learning Representations, 2025

Circuit Synthesis based on Hierarchical Conditional Diffusion.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Maximum Fanout-Free Window Enumeration: Towards Multi-Output Sub-Structure Synthesis.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

EDGE: DBMS-Empowered Boolean Decomposition for GIG Synthesis.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

MTLSO: A Multi-Task Learning Approach for Logic Synthesis Optimization.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
SeaDAG: Semi-autoregressive Diffusion for Conditional Directed Acyclic Graph Generation.
CoRR, 2024

Logic Synthesis Optimization with Predictive Self-Supervision via Causal Transformers.
CoRR, 2024

Logic Synthesis with Generative Deep Neural Networks.
CoRR, 2024

Circuit Transformer: End-to-end Circuit Design by Predicting the Next Gate.
CoRR, 2024

Towards Next-Generation Logic Synthesis: A Scalable Neural Circuit Generation Framework.
Proceedings of the Advances in Neural Information Processing Systems 38: Annual Conference on Neural Information Processing Systems 2024, 2024

A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design.
Proceedings of the Forty-first International Conference on Machine Learning, 2024

RTLRewriter: Methodologies for Large Models aided RTL Code Optimization.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

FineMap: A Fine-grained GPU-parallel LUT Mapping Engine.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
SGDP: A Stream-Graph Neural Network Based Data Prefetcher.
Proceedings of the International Joint Conference on Neural Networks, 2023

AiMap: Learning to Improve Technology Mapping for ASICs via Delay Prediction.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

EasyMap: Improving Technology Mapping via Exploration-Enhanced Heuristics and Adaptive Sequencing.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

EffiSyn: Efficient Logic Synthesis with Dynamic Scoring and Pruning.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

CPP: A Multi-Level Circuit Partitioning Predictor for Hardware Verification Systems.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

A Database Dependent Framework for K-Input Maximum Fanout-Free Window Rewriting.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Lightweight Structural Choices Operator for Technology Mapping.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
HIMap: a heuristic and iterative logic synthesis approach.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Block Access Pattern Discovery via Compressed Full Tensor Transformer.
Proceedings of the CIKM '21: The 30th ACM International Conference on Information and Knowledge Management, Virtual Event, Queensland, Australia, November 1, 2021


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