Xueqiu Yu

According to our database1, Xueqiu Yu authored at least 5 papers between 2013 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
Low-Power Multicore Processor Design With Reconfigurable Same-Instruction Multiple Process.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2013
A 65nm 39GOPS/W 24-core processor with 11Tb/s/W packet-controlled circuit-switched double-layer network-on-chip and heterogeneous execution array.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A low power register file with asynchronously controlled read-isolation and software-directed write-discarding.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A turbo decoder implementation for LTE downlink mapped on a multi-core processor platform.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

A fast multi-core virtual platform and its application on software development.
Proceedings of the IEEE 10th International Conference on ASIC, 2013


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