Yago Torroja
Orcid: 0000-0002-3557-3787
According to our database1,
Yago Torroja
authored at least 7 papers
between 1996 and 2008.
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Bibliography
2008
J. Low Power Electron., 2008
Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
2005
Switching activity propagation of VHDL-RTL combinational designs through an automated tool.
Proceedings of the 12th IEEE International Conference on Electronics, 2005
1999
IEEE Trans. Ind. Electron., 1999
1998
Quality Estimation of Test Vectors and Functional Validation Procedures Based on Fault and Error Models.
Proceedings of the 1998 Design, 1998
1996
Proceedings of the Field-Programmable Logic, 1996