Yankang Du

According to our database, Yankang Du authored at least 10 papers between 2013 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A Novel Software-Defined Convolutional Neural Networks Accelerator.

Yufeng Li, Yankang Du

IEEE Access, 2019

DIN: A Bio-Inspired Distributed Intelligence Networking.

Yufeng Li, Yankang Du, Chenhong Cao, Han Qiu

Proceedings of the Network and Parallel Computing, 2019

2018

Software-Defined FPGA-Based Accelerator for Deep Convolutional Neural Networks: (Abstract Only).

Yankang Du, Qinrang Liu, Shuai Wei, Chen Gao

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2016

A Novel Layout-Based Single Event Transient Injection Approach to Evaluate the Soft Error Rate of Large Combinational Circuits in Complimentary Metal-Oxide-Semiconductor Bulk Technology.

Yankang Du, Shuming Chen

IEEE Trans. Reliab., 2016

A DMR logic for mitigating the SET induced soft errors in combinational circuits.

Jiajin Zhang, Yang Housen, Yankang Du, Gao Quan, Peng Lin, Zhang Yue, Lichang Chen

IEICE Electron. Express, 2016

2015

Flip-flops soft error rate evaluation approach considering internal single-event transient.

Ruiqiang Song, Shuming Chen, Yibai He, Yankang Du

Sci. China Inf. Sci., 2015

2014

Different Mechanisms of Temperature Dependency of N-Hit SET in Bulk and PD-SOI Technology.

Biwei Liu, Yankang Du, Kai Zhang

IEICE Trans. Electron., 2014

Mitigating the SERs of large combinational circuits by using half guard band technique in CMOS bulk technology.

Bin Liang, Yankang Du, Hui Xu

IEICE Electron. Express, 2014

2013

Impact of pulse quenching effect on soft error vulnerabilities in combinational circuits based on standard cells.

Yankang Du, Shuming Chen, Biwei Liu

Microelectron. J., 2013

Two sides of pulse quenching effect on the single-event transient pulse width at circuit-level.

Bin Liang, Yankang Du

Proceedings of the IEEE 10th International Conference on ASIC, 2013