Yansheng Luo

According to our database1, Yansheng Luo authored at least 4 papers between 2005 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
A New Simulation Method for NBTI Analysis in SPICE Environment.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006
A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005
Simulation and analysis of inductive impact on VLSI interconnects in the presence of process variations.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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