Shabbir H. Batterywala

According to our database, Shabbir H. Batterywala authored at least 17 papers between 1997 and 2015.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2015

2SAT Based Infeasibility Resolution during Design Rule Correction on Layouts with Multiple Grids.

Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala

Proceedings of the 28th International Conference on VLSI Design, 2015

2014

Fixing Double Patterning violations with look-ahead.

Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir H. Batterywala

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Automatic design rule correction in presence of multiple grids and track patterns.

Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2009

Efficient Analog/RF Layout Closure with Compaction Based Legalization.

Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008

On Efficient and Robust Constraint Generation for Practical Layout Legalization.

Sambuddha Bhattacharya, Shabbir H. Batterywala, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Cell Swapping Based Migration Methodology for Analog and Custom Layouts.

Shabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007

Impact of Modern Process Technologies on the Electrical Parameters of Interconnects.

Debjit Sinha, Jianfeng Luo, Subramanian Rajagopalan, Shabbir H. Batterywala, Narendra V. Shenoy, Hai Zhou

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

A 3-dimensional FEM Based Resistance Extraction.

Subramanian Rajagopalan, Shabbir H. Batterywala

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

2006

A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills.

Shabbir H. Batterywala, Rohit Ananthakrishna, Yansheng Luo, Alex Gyure

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

MoM - A Process Variation Aware Statistical Capacitance Extractor.

Rohit Ananthakrishna, Shabbir H. Batterywala

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

Variance Reduction in Monte Carlo Capacitance Extraction.

Shabbir H. Batterywala, Madhav P. Desai

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004

Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables.

Shabbir H. Batterywala, Narendra V. Shenoy

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2003

A Method to Estimate Slew and Delay in Coupled Digital Circuits.

Shabbir H. Batterywala, Narendra V. Shenoy

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2002

Track assignment: a desirable intermediate step between global routing and detailed routing.

Shabbir H. Batterywala, Narendra V. Shenoy, William Nicholls, Hai Zhou

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001

Spectral Algorithm To Compute And Synthesize Reduced Order Passive Models For Arbitrary Rc Multiports.

Shabbir H. Batterywala, H. Narayanan

Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

1999

Efficient DC Analysis of RVJ Circuits for Moment and Derivative Commutations of Interconnect Networks.

Shabbir H. Batterywala, H. Narayanan

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1997

A New Partitioning Strategy Based on Supermodular Functions.

Sachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan

Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997