Yanzhou Liu

Orcid: 0000-0002-6641-7234

Affiliations:
  • University of Maryland, College Park, MD, USA (PhD 2018)


According to our database1, Yanzhou Liu authored at least 15 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2020
Passive-Active Flowgraphs for Efficient Modeling and Design of Signal Processing Systems.
J. Signal Process. Syst., 2020

2019
Optimized implementation of digital signal processing applications with gapless data acquisition.
EURASIP J. Adv. Signal Process., 2019

2018
Design of a Dynamic Data-Driven System for Multispectral Video Processing.
Proceedings of the Handbook of Dynamic Data Driven Applications Systems., 2018

Model-based Design and Implementation of Deep waveform Analysis Systems.
PhD thesis, 2018

Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Model-based cosimulation for industrial wireless networks.
Proceedings of the 14th IEEE International Workshop on Factory Communication Systems, 2018

Generalized Graph Connections for Dataflow Modeling of DSP Applications.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

2017
The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Data Flow Algorithms for Processors with Vector Extensions - Handling Actors With Internal State.
J. Signal Process. Syst., 2017

Online learning in neural decoding using incremental linear discriminant analysis.
Proceedings of the IEEE International Conference on Cyborg and Bionic Systems, 2017

Design and implementation of adaptive signal processing systems using Markov decision processes.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2016
Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

A Design Framework for Mapping Vectorized Synchronous Dataflow Graphs onto CPU-GPU Platforms.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

Jitter measurement on deep waveforms with constant memory.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016

2015
Constant-rate clock recovery and jitter measurement on deep memory waveforms using dataflow.
Proceedings of the 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC) Proceedings, 2015


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