Yasutoshi Aibara

According to our database, Yasutoshi Aibara authored at least 3 papers between 2006 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2012

A 15 MHz to 600 MHz, 20 mW, 0.38 mm² Split-Control, Fast Coarse Locking Digital DLL in 0.13 µ m CMOS.

Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic

IEEE Trans. Very Large Scale Integr. Syst., 2012

2008

A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS.

Sebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic

Proceedings of the ESSCIRC 2008, 2008

2006

A Novel False Lock Detection Technique for a Wide Frequency Range Delay-Locked Loop.

Yasutoshi Aibara, Eiki Imaizumi, Hiroaki Takagishi, Tatsuji Matsuura

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006