Yen-Chuan Huang

According to our database1, Yen-Chuan Huang authored at least 8 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2020


2013
Analysis of the leakage effect in a pipelined ADC with nanoscale CMOS technologies.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

2011
A 10-bit 100-MS/s 4.5-mW Pipelined ADC With a Time-Sharing Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010
A 0.02-mm <sup>2</sup> 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology.
IEEE J. Solid State Circuits, 2010

A 10b 100MS/s 4.5mW pipelined ADC with a time sharing technique.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2006
The design and analysis of a Miller-divider-based clock generator for MBOA-UWB application.
IEEE J. Solid State Circuits, 2006

2005
An optimization technique for RF buffers with active inductors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005


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