Yichuan Lu

According to our database1, Yichuan Lu authored at least 9 papers between 2015 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
CLLMRec: LLM-powered Cognitive-Aware Concept Recommendation via Semantic Alignment and Prerequisite Knowledge Distillation.
CoRR, November, 2025

2020
Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Analog Performance Locking through Neural Network-Based Biasing.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Post-Production Calibration of Analog/RF ICs: Recent Developments and A Fully Integrated Solution.
Proceedings of the 16th International Conference on Synthesis, 2019

2018
On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs.
Proceedings of the IEEE International Test Conference, 2018

2017
Knob non-idealities in learning-based post-production tuning of analog/RF ICs: Impact & remedies.
Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2016
On-die learning-based self-calibration of analog/RF ICs.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

2015
A comparative study of one-shot statistical calibration methods for analog / RF ICs.
Proceedings of the 2015 IEEE International Test Conference, 2015

Silicon Demonstration of Statistical Post-Production Tuning.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015


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