Yohan Ko

Orcid: 0000-0002-9456-0927

According to our database1, Yohan Ko authored at least 14 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
EXPERTISE: An Effective Software-level Redundant Multithreading Scheme against Hardware Faults.
ACM Trans. Archit. Code Optim., 2022

Root cause analysis of soft-error-induced failures from hardware and software perspectives.
J. Syst. Archit., 2022

2021
Comprehensive Failure Analysis against Soft Errors from Hardware and Software Perspectives.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2018
EXPERT: Effective and flexible error protection by redundant multithreading.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Protecting Caches from Soft Errors: A Microarchitect's Perspective.
ACM Trans. Embed. Comput. Syst., 2017

Indoor localization in home environments using appearance frequency information.
Proceedings of the 2017 IEEE International Conference on Systems, Man, and Cybernetics, 2017

2016
Software-Based Selective Validation Techniques for Robust CGRAs Against Soft Errors.
ACM Trans. Embed. Comput. Syst., 2016

Multi-level cache vulnerability estimation: The first step to protect memory.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

Collaborative classification for daily activity recognition with a smartwatch.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

Escalating Memory Accesses to Shared Memory by Profiling Reuse.
Proceedings of the 10th International Conference on Ubiquitous Information Management and Communication, 2016

gemV: A validated toolset for the early exploration of system reliability.
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

2015
Guidelines to design parity protected write-back L1 data cache.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2013
Dynamic code duplication with vulnerability awareness for soft error detection on VLIW architectures.
ACM Trans. Archit. Code Optim., 2013

Selective validations for efficient protections on Coarse-Grained Reconfigurable Architectures.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013


  Loading...